Supported Ddri Sdram Configurations; Ddri Sdram Bank Sizes And Configurations - Intel IXP45X Developer's Manual

11.2.2.2

DDRI SDRAM Bank Sizes and Configurations

The MCU supports a memory subsystem ranging from 32 Mbyte to 1 Gbyte for 32-bit
memory systems. An ECC or non-ECC system may be implemented using x8, or x16
devices.
Table 203.

Supported DDRI SDRAM Configurations

DDRI
SDRAM
Technology
3
128 Mbit
256 Mbit
512 Mbit
4
1 Gbit
1. Table indicates 32-bit wide memory subsystem sizes.
2. Table indicates 32-bit wide memory page sizes.
3. Supported with DDRI SDRAM only
4. Supported with DDRI SDRAM only
The 128/256/512-Mbit, 1-Gbit DDRI SDRAM devices comprise four internal leaves. The
MCU controls the leaf selects within 128/256/512 Mbit, 1 Gbit DDRI SDRAM by toggling
DDRI_BA[0] and DDRI_BA[1].
The two DDRI SDRAM chip enables DDRI_CS_N[1:0] support an DDRI SDRAM memory
subsystem consisting of two banks. The base address for the two contiguous banks are
programmed in the DDRI SDRAM Base Register (SDBR) and must be aligned to a
32 Mbyte boundary. The size of each DDRI SDRAM bank is programmed with the DDRI
SDRAM boundary registers (SBR0 and SBR1). Bank 0 is also configurable into multiple
regions.
Note: Systems must implement memory devices of all the same bus width (x8, x16) due to
the single CAS address decode generated for a DDRI transaction. For example, systems
implementing ECC and using x16 devices for the 32 bit DDRI data bus must also use a
x16 device for the 8 bit ECC bus, even though 8 bits go unused.
Note: For IXP45X/IXP46X network processors, the DDRI SDRAM 32-Bit Size Register (S32SR)
will not be used, since it will always be in 32-bit mode.
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
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® ®
Intel IXP45X and Intel
Table 203 illustrates the supported DDRI SDRAM configurations.
DDRI SDRAM
# Banks
Arrangement
1
16 M x 8
2
1
8 M x 16
2
1
32 M x 8
2
1
16 M x 16
2
1
64 M x 8
2
1
32 M x 16
2
1
128 M x 8
2
1
64 M x 16
2
IXP46X Product Line of Network Processors—Memory Controller
Address Size Leaf Select
DDRI_BA[1
Row Column
]
12 10 ADDR[26]
12 9 ADDR[25]
13 10 ADDR[27]
13 9 ADDR[26]
13 11 ADDR[28]
13 10 ADDR[27]
14 11 ADDR[29]
14 10 ADDR[28]
Total
Page
Memory
Size
1
DDRI_BA[0] Size
64 M
ADDR[25]
128 M
32 M
ADDR[24]
64 M
128 M
ADDR[26]
256 M
64 M
ADDR[25]
128 M
256 M
ADDR[27]
512 M
128 M
ADDR[26]
256 M
512 M
ADDR[28]
1 G
256 M
ADDR[27]
512 M
August 2006
Order Number: 306262-004US
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