Intel IXP45X Developer's Manual page 227

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Internal Buses—Intel IXP45X and Intel
Table 99. Memory Map (Sheet 2 of 2)
Start Address
C800_8000
C800_9000
C800_A000
C800_B000
C800_C000
C800_D000
C800_E000
C800_F000
C801_0000
C801_1000
C801_2000
C801_3000
CC00_E500
CD00_0000
CE00_0000
Notes:
1. The lowest 256 Mbyte of address space is configurable based on the value of a configuration
register located in the Expansion Bus Controller.
2. When bit 31 (MEM_MAP) of configuration register #0 (EXP_CFG0) is set to logic 1, the Expansion
Bus occupies the lowest 256 Mbyte of address space.
• When bit 31 (MEM_MAP) of configuration register #0 (EXP_CFG0) is set to logic 0 the
Expansion Bus occupies 256MB of address space starting at 5000_0000 while the DDRI
SDRAM occupies the lower 256 Mbyte of address.
• In both cases, regardless of the value of MEM_MAP, the DDRI SDRAM occupies the
768 MB (from 1000_0000 to 3FFF_FFFF) immediately following the lowest 256 Mbyte
and the Expansion Bus can be accessed starting at address 5000_0000.
• On reset, the configuration register in the Expansion Bus will be set to logic 1. This
setting is required because the dedicated boot memory is flash memory located on the
Expansion Bus.
August 2006
Order Number: 306262-004US
®
IXP46X Product Line of Network Processors
End Address Size
C800_8FFF 1 KB
C800_9FFF 1 KB
C800_AFFF 1 KB
C800_BFFF 1 KB
C800_CFFF 1KB
C800_DFFF 1KB
C800_EFFF 1KB
C800_FFFF 1KB
C801_0FFF 1KB
C801_1FFF 1KB
C801_2FFF 1KB
CC00_E4FF
CC00_F5FF 1KB
CDFF_FFFF 256MB
FFFF_FFFF
®
Intel IXP45X and Intel
Use
NPE-C (IXP400 software Definition) – Not User
Programmable
Ethernet MAC 0 on NPE B
Ethernet MAC on NPE C
USB Device Controller
Ethernet MAC on NPE A
Ethernet MAC 1 on NPE B
Ethernet MAC 2 on NPE B
Ethernet MAC 3 on NPE B
IEEE1588 Hardware Assist
2
I C Unit
SSP Unit
(Reserved)
DDRI-266 SDRAM Configuration Registers
USB Host Controller
(Reserved)
®
IXP46X Product Line of Network Processors
Developer's Manual
227