Btb Entry; Branch History - Intel IXP45X Developer's Manual

Intel
Figure 8.

BTB Entry

Branch Address[31:9,1]
The BTB takes the current instruction address and checks to see if this address is a
branch that was previously seen. The BTB uses bits [8:2] of the current address to read
out the tag and then compares this tag to bits [31:9,1] of the current instruction
address. If the current instruction address matches the tag in the cache and the history
bits indicate that this branch is usually taken in the past, the BTB uses the data (target
address) as the next instruction address to send to the instruction cache.
Bit[1] of the instruction address is included in the tag comparison in order to support
Thumb execution. This organization means that two consecutive Thumb branch (B)
instructions, with instruction address bits[8:2] the same, will contend for the same BTB
entry. Thumb also requires 31 bits for the branch target address. In Intel
mode, bit[1] is zero.
The history bits represent four possible prediction states for a branch entry in the BTB.
Figure 9, "Branch History" on page 84
transitions. The initial state for branches stored in the BTB is Weakly-Taken (WT). Every
time a branch that exists in the BTB is executed, the history bits are updated to reflect
the latest outcome of the branch, either taken or not-taken.
"Performance Considerations" on page 181
dynamically predicted by the BTB and the performance penalty for incorrectly
predicting a branch.
The BTB does not have to be managed explicitly by software; it is disabled by default
after reset and is invalidated when the instruction cache is invalidated.
Figure 9.

Branch History

Not
Taken
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
84
® ®
IXP45X and Intel IXP46X Product Line of Network Processors—Intel XScale
TAG
Taken
SN WN
Not Taken
Not Taken
SN: Strongly Not Taken
WN: Weakly Not Taken
DATA
Target Address[31:1]
shows these states along with the possible
describes which instructions are
Taken
Taken
WT
Not Taken
ST: Strongly Taken
WT: Weakly Taken
®
Processor
History
Bits[1:0]
B4330-01
®
StrongARM
ST
Taken
B4331-01
August 2006
Order Number: 306262-004US
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