Pci Rcomp Circuitry; August; Register Descriptions; Pci Configuration Registers - Intel IXP45X Developer's Manual

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PCI Controller—Intel IXP45X and Intel
Note that DMA completions can generate an interrupt on the DMA interrupt outputs or
on the general-purpose interrupt PCC_INT. Separate DMA interrupt enables are
provided for each interrupt output signal but there remains just one interrupt source
for each DMA channel in the DMA Control register.
10.4

PCI RCOMP Circuitry

The PCI RCOMP circuitry dynamically compensates for variations in operating
conditions due to process, temperature and voltage. These variations are measured
through a resistive mechanism in a special I/O Pad and evaluated in the associated
compensation circuitry. Adjustments are made to the drive strength of the buffers for
the PCI interface ensuring error free operation over the entire range of operating
conditions.
The RCOMP circuitry requires an external reference resistor that models the load the
PCI pads will see in the board environment. For specific RCOMP pin requirements, see
the Intel
The circuitry adjusts the PCI pads' current sourcing strength by comparing the voltage
of the output buffer driven through the external reference resistor with an internally
generated 60% threshold voltage. The circuitry adjusts the PCI pads' current sinking
strength by comparing the output buffer voltage with an internally generated 40%
threshold voltage. Once drive strengths are determined for the 60% and 40%
thresholds a multiplier is applied to the drive strengths to provide for a margin above
and below the 60% and 40% thresholds, respectively.
10.5

Register Descriptions

The following sections describe the internal PCI Configuration registers. Registers or
fields defined as reserved return 0s when read and are not affected by writes. The
access key is as follows:
Table 199.

Register Legend

Attribute
RV
PR
RS
RW
RW1C
10.5.1

PCI Configuration Registers

These registers comprise the configuration registers as defined in the PCI 2.2
specification with the exception of the pci_rtotto register which is device specific. They
are accessible from the PCI bus using configuration read and write transactions and
from the Intel XScale processor by accessing the PCI Controller CSR-based PCI
Configuration register port.

August 2006

Order Number: 306262-004US
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IXP46X Product Line of Network Processors
® ®
IXP45X and Intel IXP46X Product Line of Network Processors Datasheet.
Legend
Reserved
Preserved
Read/Set
Read/Write
Normal Read
Write '1' to clear
Table 200
Attribute Legend
RC Read Clear
RO Read Only
WO Write Only
NA Not Accessible
Normal Read
RW1S
Write '1' to set
lists the registers.
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
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