Udc Data Register 10; Udc Data Register 11 - Intel IXP45X Developer's Manual

8.5.40

UDC Data Register 10

Endpoint 10 is an interrupt IN endpoint that is 8 bytes deep. Data must be loaded via
direct Intel XScale processor writes.
Because the USB system is a host-initiator model, the host must poll Endpoint 10 to
determine interrupt conditions. The UDC cannot initiate the transaction.
Register Name:
0 x C800B0C0
Hex Offset Address:
Register
Universal Serial Bus Device Endpoint 10 Data Register
Description:
Access: Write
31
Bits
31:8
7:0
8.5.41

UDC Data Register 11

Endpoint 11 is a double-buffered, bulk IN endpoint that is 64 bytes deep. Data can be
loaded via direct Intel XScale processor writes.
Because it is double-buffered, up to two packets of data may be loaded for
transmission.
Register Name:
0 x C800BB00
Hex Offset Address:
Register
Universal Serial Bus Device Endpoint 11 Data Register
Description:
Access: Write
31
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
348
® ®
Intel IXP45X and Intel
(Reserved)
X
Resets (Above)
Register
Name
Reserved for future use.
DATA Top of endpoint data currently being loaded.
(Reserved)
X
Resets (Above)
IXP46X Product Line of Network Processors—USB 1.1 Device
UDDR10
0x00000000
Reset Hex Value:
Bits
UDDR10
Description
UDDR11
0x00000000
Reset Hex Value:
Bits
Controller
(UDDR10)
8 7
(8-Bit Data)
0 0 0 0 0 0 0
(UDDR11)
8 7
(8-Bit Data)
0 0 0 0 0 0 0
August 2006
Order Number: 306262-004US
0
0
0
0