Transmit Two Part Deferral Parameters 2; Slot Time; Mdio Commands Registers - Intel IXP45X Developer's Manual

Bits
31:8
7:0
6.2.18

Transmit Two Part Deferral Parameters 2

Register Name:
0xC8009064
Hex Offset Address:
Register
Transmit Two Part Deferral Parameters Register
Description:
Access: Read/Write.
31
Bits
31:8
7:0
6.2.19

Slot Time

Register Name:
0xC8009070
Hex Offset Address:
Register
Slot Time Register
Description:
Access: Read/Write.
31
Bits
31:8
7:0
6.2.20

MDIO Commands Registers

Four registers make up the 32-bit MDIO Command:
• MDIO Command[31:24] — MDIO Command 4
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
254
® ®
Intel IXP45X and Intel
Register
Name
(Reserved)
Number of transmit clock cycles (tx_clk) in the first deferral period minus three,
First deferral
when two-part deferral is used for transmission (Transmit Control 1[5] = 1) and
period
half-duplex mode.
(Reserved)
Register
Name
(Reserved)
Second Number of transmit clock cycles (tx_clk) in the second deferral period minus
Deferral three, when two-part deferral is used for transmission (Transmit Control 1[5] =
Period 1) and half-duplex mode.
(Reserved)
Register
Name
(Reserved)
Slot time for back-off algorithm
Slot Time Expressed in number of tx_clk cycles.
128 in MII mode.
IXP46X Product Line of Network Processors—Ethernet MACs
txdefpars
Description
tx2partdefpars2
0x00000000
Reset Hex Value:
tx2defpars
Description
slottime
0x00000000
Reset Hex Value:
slottime
Description
8 7
Second Deferral Period
8 7
Slot Time
August 2006
Order Number: 306262-004US
0
0