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AHB-PKE Bridge—Intel
IXP45X and Intel
23.0
AHB-PKE Bridge
23.1
Overview
The AHB-PKE Bridge consists of a protocol translation from the AHB bus to the PKE /
Crypto Bus. The bridge is used to connect the high-speed AHB bus to the PKE Crypto
Bus. The PKE Crypto Bus is where the hardware accelerator peripherals — such as the
RNG, SHA, and EAU — reside.
The bridge provides a 32-bit-wide data path between the two buses. Address bits
31:17 of the AHB bus are not sent to the bridge. The AHB arbiter decodes the upper 8
bits of the address, and a Select signal is used to indicate that the address references a
location downstream of the bridge, on the PKE bus.
Address bits 16:8 are decoded by the bridge and used to determine which of the crytpo
peripherals is selected. Address bits 11:1 are passed to the PKE Bus. All writes and
reads to PKE peripherals must be word aligned single word accesses. The PKE bridge
transforms AHB word accesses into two half-word accesses on the PKE local bus.
Only the Intel XScale
AHB arbiter enforces this access rule.
23.2
Feature List
The AHB-PKE Bridge supports:
• 32-bit wide data path only - Single Word accesses only, no byte, half word or burst
accesses supported, all other size accesses return AHB Bus ERROR
• Only supports SINGLE word reads and writes, all other accesses will return AHB
Bus ERROR.
• 10 bits of address downstream
• Decode of address bits 16:8 to select a peripheral on the PKE bus
• Support up to a 4KB EAU ram space
• Additionally the EAU and SHA blocks will generate interrupts to the Intel XScale
processor. (eau_int, sha_int)
August 2006
Order Number: 306262-004US
®
IXP46X Product Line of Network Processors
®
Processor bus master has access to the PKE peripherals. The
®
Intel
IXP45X and Intel
®
IXP46X Product Line of Network Processors
Developer's Manual
907
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