Force Stall (Fst); Receive Fifo Not Empty (Rne); Setup Active (Sa) - Intel IXP45X Developer's Manual

Network processors
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USB 1.1 Device Controller—Intel
Processors
8.5.2.6

Force Stall (FST)

The force stall bit can be set by the Intel XScale processor to force the UDC to issue a
STALL handshake. The UDC issues a STALL handshake for the current setup control
transfer and the bit is cleared by the UDC because endpoint 0 cannot remain in a
stalled condition.
8.5.2.7

Receive FIFO Not Empty (RNE)

The receive FIFO not empty bit indicates that the receive FIFO contains unread data. To
determine if the FIFO has data in it, this bit must be read when the UDCCS0[OPR] bit is
set. The receive FIFO must continue to be read until this bit clears or the data will be
lost.
If UDCCS0[RNE] is not set when an interrupt generated by UDCCS0[OPR] is initially
serviced, it indicates that a zero-length OUT packet was received.
8.5.2.8

Setup Active (SA)

The Setup Active bit indicates that the current packet in the FIFO is part of a USB setup
command. This bit generates an interrupt and becomes active at the same time as
UDCCS0[OPR]. Software must clear this bit by writing a 1 to it. Both UDCS0[OPR] and
UDCCS0[SA] must be cleared.
Register Name:
0 x C800B010
Hex Offset Address:
Register
Universal Serial Bus Device Controller Endpoint 0 Control and Status Register
Description:
Access: Read/Write
31
Bits
31:8
7
6
5
4
3
August 2006
Order Number: 306262--, Revision: 004US
®
®
IXP45X and Intel
IXP46X Product Line of Network
Bits
(Reserved)
X
Resets (Above)
Register
Name
Reserved for future use
Setup Active (read/write 1 to clear)
SA
1 = Setup command is active on the USB
Receive FIFO not empty (read-only).
RNE
0 = Receive FIFO empty.
1 = Receive FIFO not empty.
Force stall (read/write 1 to set).
FST
1 = Force stall handshake
Sent stall (read/write 1 to clear).
SST
1 = UDC sent stall handshake
Device remote wake-up feature (read-only)
DRWF
0 = Device Remote Wake-Up Feature is disabled.
1 = Device Remote Wake-Up Feature is enabled.
Intel
UDCCS0
Reset Hex Value:
0 x 00000000
UDCCS0
(Sheet 1 of 2)
Description
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors
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Developer's Manual
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