C Register Addresses; C Control Register - Icr; I 2 C Status Register - Isr; I 2 C Slave Address Register - Isar - Intel IXP45X Developer's Manual

I2C Bus Interface Unit—Intel
Table 282. Register Legend
Attribute
RV
PR
RS
RW
RW1C
2
Table 283. I

C Register Addresses

Register Addresses
0xC801_1000
0xC801_1004
0xC801_1008
0xC801_100C
0xC801_1014
2
21.10.1 I

C Control Register - ICR

The IXP45X/IXP46X network processors use the bits in the I
to control the I
Register Name:
Block
0xC801_1000
Base Address:
2
I C Control Register
Register Description:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
(Reserved)
Register
Bits Name
31:1
— (Reserved)
6
Fast Mode:
15 Fast Mode
0 = 100-Kbps operation
1 = 400-Kbps operation
Unit Reset:
14 Unit Reset
0 = No reset.
1 = Reset the I
Slave Address Detected Interrupt Enable:
Slave
Address
0 = Disable interrupt.
13 Detected
1 = Enables the I
Interrupt
Enable
August 2006
Order Number: 306262-004US
® ®
IXP45X and Intel IXP46X Product Line of Network Processors
Legend
Reserved
Preserved
Read/Set
Read/Write
Normal Read
Write '1' to clear
Name
ICR
ISR
ISAR
IDBR
IBMR
2
C unit.
Offset Address
I
Description
2
C unit only.
2
C unit to interrupt the IXP45X/IXP46X network
processors upon detecting a slave address match or a general call
address.
Attribute Legend
RC Read Clear
RO Read Only
WO Write Only
NA Not Accessible
Normal Read
RW1S
Write '1' to set
"I2C Control Register - ICR" on page 897
"I2C Status Register - ISR" on page 899
"I2C Slave Address Register - ISAR" on page 901
"I2C Data Buffer Register - IDBR" on page 902
"I2C Bus Monitor Register - IBMR" on page 902
2
I C Control Register
Reg
OffsetAddress
2
C Control Register (Sheet 1 of 3)
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Description
2
C Control Register (ICR)
0x0000_0000
Reset Value
Access: (See below.)
8 7 6 5 4 3
See table below.
Reset
Access
Value
0000H
0
0
0
Developer's Manual
2 1 0
—
RW
RW
RW
897