Address Mask 1; Address Mask 2; August - Intel IXP45X Developer's Manual

• Address Mask[23:16] — Address Mask 4
• Address Mask[15:8] — Address Mask 5
• Address Mask[7:0] — Address Mask 6
Example: Address Mask is 00-A0-24-D1-7F-02
• Address Mask 1 = 0x00
• Address Mask 2 = 0x00
• Address Mask 3 = 0x00
• Address Mask 4 = 0xFF
• Address Mask 5 = 0xFF
• Address Mask 6 = 0x00
The detailed bit descriptions follow the six registers' bit maps.
6.2.31

Address Mask 1

Register Name:
0x C80090A0
Hex Offset Address:
Address Mask Register #1. First register of six that makes up the Address Mask. Address
Mask is used with Address for multicast address filtering. Bits set to 1 in Address Mask
Register
represent bits of the Address Register that must match the corresponding bits in incoming
Description:
destination addresses for packets to be accepted
Access: Read/Write.
31
6.2.32

Address Mask 2

Register Name:
0x C80090A4
Hex Offset Address:
Address Mask Register #1. Second register of six that makes up the Address Mask. Address
Mask is used with Address for multicast address filtering. Bits set to 1, in Address Mask,
Register
represent bits of the Address Register that must match the corresponding bits in incoming
Description:
destination addresses for packets to be accepted.
Access: Read/Write.
31
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
258
® ®
Intel IXP45X and Intel
(Reserved)
(Reserved)
IXP46X Product Line of Network Processors—Ethernet MACs
addrmask1
0x00000000
Reset Hex Value:
addrmask2
0x00000000
Reset Hex Value:
8 7
ADDRESS MASK[7:0]
8 7
ADDRESS MASK[15:8]

August 2006

Order Number: 306262-004US
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