Id Register; Cache Type Register - Intel IXP45X Developer's Manual

Network processors
Table of Contents

Advertisement

®
Intel XScale
Processor—Intel
The ID Register is selected when opcode_2=0. This register returns the code for the
IXP45X/IXP46X network processors.
Table 12.

ID Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
1
1
reset value: As Shown
Bits
31:24
23:16
15:13
12:10
9:4
3:0
The Cache Type Register is selected when opcode_2=1 and describes the cache
configuration of the Intel XScale processor.
Table 13.
Cache Type Register (Sheet 1 of 2)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
0
0
reset value: As Shown
Bits
31:29
28:25
24
23:21
20:18
17:15
14
13:12
11:9
8:6
August 2006
Order Number: 306262-004US
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors
0
1
0
0
1
0
0
0
0
Access
Read / Write Ignored
Read / Write Ignored
Read / Write Ignored
Read / Write Ignored
Read / Write Ignored
Read / Write Ignored
0
1
0
1
1
0
0
0
Access
Read-as-Zero / Write Ignored
Read / Write Ignored
Read / Write Ignored
Read-as-Zero / Write Ignored
Read / Write Ignored
Read / Write Ignored
Read-as-Zero / Write Ignored
Read / Write Ignored
Read-as-Zero / Write Ignored
Read / Write Ignored
Core
Core
0
1
0
1
Revisio
Gen
Implementation trademark
(0x69 = 'i'= Intel Corporation)
Architecture version = Intel
(0x05 will be value returned)
Core Generation
0b010 = Intel XScale
This field reflects a specific set of architecture features
supported by the core. If new features are added/
deleted/modified this field will change.
Core Revision:
This field reflects revisions of core generations.
Differences may include errata that dictate different
operating conditions, software work-around, etc. Value
returned will be 000b
Product Number for:IXP45X/IXP46X network processors
100000b
Product Revision for:IXP45X/IXP46X network processors
0000b
Dsize
1
0
1
0
1
0
Reserved
Cache class = 0b0101
The caches support locking, write back and round-robin
replacement. They do not support address by index.
Harvard Cache
Reserved
Data Cache Size (Dsize)
0b110 = 32 KB
Data cache associativity = 0b101 = 32-way
Reserved
Data cache line length = 0b10 = 8 words/line
Reserved
Instruction cache size (Isize)
0b110 = 32 KB
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
8
7
6
5
4
3
Product Number
n
Description
®
*
StrongARM
Version 5TE
®
Processor
8
7
6
5
4
3
0
0
0
Isize
1
0
1
Description
Developer's Manual
2
1
0
Product
Revision
2
1
0
0
1
0
99

Advertisement

Table of Contents
loading

This manual is also suitable for:

Ixp46x

Table of Contents