Example: Ahb Memory Base Address Register, Ahb I/O Base Address Register, And Pci Memory Base Address Register - Intel IXP45X Developer's Manual

Network processors
Table of Contents

Advertisement

®
PCI Controller—Intel
IXP45X and Intel
10.2.4.1
Example: AHB Memory Base Address Register, AHB I/O Base
Address Register, and PCI Memory Base Address Register
The following example can be used to understand the operation of the AHB Memory
Base Address Register (PCI_AHBMEMBASE), AHB I/O Base Address Register
(PCI_AHBIOBASE), and PCI Memory Base Address Register (PCI_PCIMEMBASE).
1. Assume that PCI_AHBMEMBASE = 0x04010506 and PCI_AHBIOBASE =
0x000A1200.
2. Assume that the PCI Bus has gone through configuration and the Base Address
Registers (BAR0 – BAR5) are set as follows:
— BAR0 = 0xA0000000
— BAR1 = 0xA1000000
— BAR2 = 0xA2000000
— BAR3 = 0xA3000000
— BAR4 = 0xA4000000
— BAR5 = 0xA5123400
3. An external PCI device initiates a PCI bus transfer to BAR1 of the IXP45X/IXP46X
network processors. The PCI address looks like the following: PCI Address =
0xA100402C. The address placed on the South AHB is 0100402C.
Notice that the third byte from the right, of the PCI_AHBMEMBASE = 0x04010506,
is substituted for the A1 located in the fourth byte from the right of the PCI Address
= 0xA100402C.
4. Next, an external PCI device initiates a PCI bus transfer to BAR3 of the IXP45X/
IXP46X network processors. The PCI address looks like the following: PCI Address
= 0xA3004014. The address placed on the South AHB is 06004014.
Notice that the first byte from the right of the PCI_AHBMEMBASE = 0x04010506 is
substituted for the A3 located in the fourth byte from the right of the PCI Address =
0xA3004014.
5. PCI I/O space example is an external PCI device initiates a PCI bus transfer to
BAR5 of the IXP45X/IXP46X network processors. The PCI address looks like the
following PCI Address = 0xA5123418. The address placed on the South AHB is
0x0A120018.
Notice that the first three bytes from the right of the PCI_AHBIOBASE =
0x000A1200 is substituted for the A51234 located in the PCI Address =
0xA5123418.
6. The final example is an external PCI device initiates a PCI bus transfer to BAR4 of
the IXP45X/IXP46X network processors. This allows access to the PCI Controller
Configuration and Status Register. The PCI address looks like the following PCI
Address = 0xA4000038. There is no address placed on the South AHB. This causes
an access of the PCI Doorbell Register on the IXP45X/IXP46X network processors.
When the IXP45X/IXP46X network processors are the initiator of a PCI Bus transaction
and desires the transaction to produce PCI Memory Transactions, the values may be
written or read by providing a transfer to the PCI Memory Cycle Address Space defined
for the IXP45X/IXP46X network processors. The 64-Mbyte address space defined for
the PCI Memory Cycle Address Space is from AHB address location 0x48000000 to
0x4BFFFFFF.
Only four 16-Mbyte windows can be enabled. The four 16-Mbyte windows are divided
among the addresses as shown in
August 2006
Order Number: 306262-004US
®
IXP46X Product Line of Network Processors
Table
191.
®
Intel
IXP45X and Intel
®
IXP46X Product Line of Network Processors
Develepor's Manual
507

Advertisement

Table of Contents
loading

This manual is also suitable for:

Ixp46x

Table of Contents