Gpio Interrupt Type Register 2 - Intel IXP45X Developer's Manual

®
GPIO Controller—Intel IXP45X and Intel
Register
Bits Name
27 gpio_npe_3 as per gpio_npe_7
26 gpio_npe_2 as per gpio_npe_7
25 gpio_npe_1 as per gpio_npe_7
24 gpio_npe_0 as per gpio_npe_7
000 – Active High
001 – Active Low
23:2
GPIO7 010 – Rising Edge
1
011 – Falling Edge
1xx – Transitional
20:1
GPIO6 As per GPIO7
8
17:1
GPIO5 As per GPIO7
5
14:1
GPIO4 As per GPIO7
2
11:9 GPIO3 As per GPIO7
8:6 GPIO2 As per GPIO7
5:3 GPIO1 As per GPIO7
2:0 GPIO0 As per GPIO7
15.5.6

GPIO Interrupt Type Register 2

This register describes how to interpret GPIO[15:8] as interrupts, either level or edge,
along with high, low, rising, falling, transitional three bits describe each GPIO pin, as
described in the following table.
Register Name:
Physical Address:
Register Description:
Access: Read/Write
3
1
(Reserved)
August 2006
Reference Number: 306262-004US
®
IXP46X Product Line of Network Processors
Description
0xC8004014
This register is used to control interrupt type for GPIO 15:8
GPIO15 GPIO14 GPIO13
Intel
GPIT1R (Sheet 2 of 2)
GPIT2R
Reset Hex Value:
1 1
6 5
GPIO12 GPIO11
® ®
IXP45X and Intel IXP46X Product Line of Network Processors
Reset
Access
Value
0 RW
0 RW
0 RW
0 RW
000
RW
Active High
000
RW
Active High
000
RW
Active High
000
RW
Active High
000
RW
Active High
000
RW
Active High
000
RW
Active High
000
RW
Active High
0x00000000
8 7
GPIO10 GPIO9 GPIO8
Developer's Manual
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