Register Summary Table - Intel IXP45X Developer's Manual

Time Synchronization Hardware Assist (TSYNC)—Intel
Line of Network Processors
Table 268. Register Summary Table (Sheet 1 of 2)
Address Offset
paddr[11:0]
August 2006
Order Number: 306262-004US
000
004
008
00C
010
014
018
01C RawSystemTime_High
020
024
028
02C
030 AuxSlaveModeSnap_Low
034 AuxSlaveModeSnap_High
038 AuxMasterModeSnap_Low
03C AuxMasterModeSnap_High
040
044
048
04C XMIT_Snapshot0_High
050 RECV_Snapshot0_Low
054 RECV_Snapshot0_High
058
05C SequenceID0/SourceUUID0_High
060
064
068 XMIT_Snapshot1_Low
06C XMIT_Snapshot1_High
070 RECV_Snapshot1_Low
074 RECV_Snapshot1_High
078
07C SequenceID1/SourceUUID1_High
080
084
088 XMIT_Snapshot2_Low
08C XMIT_Snapshot2_High
090 RECV_Snapshot2_Low
094 RECV_Snapshot2_High
098
® ®
IXP45X and Intel IXP46X Product
Function
Time Sync Control
Time Sync Event
Addend
Accumulator
Time Sync Test
Unused
RawSystemTime_Low
SystemTime_Low
SystemTime_High
TargetTime_Low
TargetTime_High
TS_Channel0_Control
TS_Channel0_Event
XMIT_Snaphot0_Low
SourceUUID0_Low
TS_Channel1_Control
TS_Channel1_Event
SourceUUID1_Low
TS_Channel2_Control
TS_Channel2_Event
SourceUUID2_Low
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Mnemonic Access
TS_Control RW
TS_Event RW
TS_Addend RW
TS_Accum RW
TS_Test RW
- -
TS_RSysTime_Lo RO
TS_RSysTimeHi RO
TS_SysTimeLo RW
TS_SysTimeHi RW
TS_TrgtLo RW
TS_TrgtHi RW
TS_ASMSLo RO
TS_ASMSHi RO
TS_AMMSLo RO
TS_AMMSHi RO
TS_Ch0_Control RW
TS_Ch0_Event RW
TS_TxSnap0Lo RO
TS_TxSnap0Hi RO
TS_RxSnap0Lo RO
TS_RxSnap0Hi RO
TS_SrcUUID0Lo RO
TS_ SrcUUID0Hi RO
TS_Ch1_Control RW
TS_Ch1_Event RW
TS_TxSnap1Lo RO
TS_TxSnap1Hi RO
TS_RxSnap1Lo RO
TS_RxSnap1Hi RO
TS_SrcUUID1Lo RO
TS_SrcUUID1Hi RO
TS_Ch2_Control RW
TS_Ch2_Event RW
TS_TxSnap2Lo RO
TS_TxSnap2Hi RO
TS_RxSnap2Lo RO
TS_RxSnap2Hi RO
TS_SrcUUID2Lo RO
Developer's Manual
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