Memory Controller Unit (Mcu), Multiple-Bit, Ecc Error - Intel IXP45X Developer's Manual

Network processors
Table of Contents

Advertisement

®
Error Handling—Intel
IXP45X and Intel
28.0
Error Handling
This section details the types of system level error conditions that may occur in the
®
Intel
IXP45X and Intel
the effect of each of these errors.
28.1
Errors
28.1.1
Sources of AHB Bus Errors
AHB Bus errors can occur as a result of a variety of problems. The problems can
generally be categorized as either:
• Attempts to access memory locations which are either unimplemented or reserved,
• Attempts to access units with types of accesses the units are not designed to
accept (such as INCR 16 for many IXP45X/IXP46X network processors), or
• Data Corruption in the target, indicated by either parity errors or uncorrectable ECC
errors in memory.
28.1.1.1
Accesses to Reserved or Unimplemented Addresses
Accesses to reserved or unimplemented memory will result in an AHB error response
being asserted by the bus arbiter.
28.1.1.2
Illegal-Access Types
Any unit which receives an access type which it can't respond properly to will respond
with an AHB error response. See individual unit descriptions to see what types of
transactions each unit is capable of responding to.
28.1.1.3
Expansion Bus Parity Error
When the Expansion Bus Controller receives a parity error on the Expansion Bus, it
responds on the AHB bus with an error response to the appropriate master. In addition,
it will send an interrupt signal to the interrupt controller, and log the address of the
access which faulted.
28.1.1.4
AQM-Parity Error
When the AQM receives a parity error from its internal memory, it will return AHB error
to the requesting master. In addition, it will send an interrupt signal to the interrupt
controller. As a result of this operation, the operating system must assume the entire
queue is corrupt, and it should reset the unit, clearing all data entries in the queue.
28.1.1.5

Memory Controller Unit (MCU), Multiple-Bit, ECC Error

When the MCU unit receives a multiple-bit ECC error, it will return AHB error to the
requesting AHB master. In addition, it will send an interrupt signal to the interrupt
controller, and log the address of the access which failed.
August 2006
Order Number: 306262-004US
®
IXP46X Product Line of Network Processors
®
IXP46X Product Line of Network Processors. It also describes
®
Intel
IXP45X and Intel
®
IXP46X Product Line of Network Processors
Developer's Manual
951

Advertisement

Table of Contents
loading

This manual is also suitable for:

Ixp46x

Table of Contents