Pci Controller Arbiter Configuration - Intel IXP45X Developer's Manual

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PCI Controller—Intel
IXP45X and Intel
10.3.2.3.1
PCI Arbiter
The PCI Controller contains a PCI bus arbiter that supports four external masters in
addition to the PCI Controller's Initiator Interface. To enable the arbiter, the exp_pciarb
pin must be a logic 1. When the arbiter is enabled, the PCI Controller PCI request and
grant signals are routed internal to the chip and cannot be viewed externally.
shows a conceptual view of the arbiter request and grant signal wiring. The PCI Master
Interface, Arbiter, and 2:1 multiplexer are part of the PCI Controller.
Figure 90.

PCI Controller Arbiter Configuration

exp_pciarb
REQ_N[0]
REQ_N[3:1]
The arbiter uses a simple round-robin priority algorithm. The arbiter asserts the grant
signal corresponding to the next request in the round-robin during the current
executing transaction on the PCI bus (i.e. arbitration is hidden). If the arbiter detects
that an initiator has failed to assert the PCI_FRAME_N signal after 16 cycles of both
grant assertion and a PCI bus idle condition, the arbiter deasserts the grant. That
master does not receive any more grants until it deasserts its request for at least one
PCI clock cycle. Bus parking is implemented in that the last bus grant will stay asserted
if no request is pending. To prevent bus contention, if the PCI bus is idle, the arbiter
never asserts one grant signal in the same PCI cycle in which it deasserts another. It
deasserts one grant, then asserts the next grant after one full PCI clock cycle has
elapsed to provide for bus driver turnaround.
10.3.2.3.2
PCI Interrupt Inputs
If used as a PCI host, up to 4 PCI interrupt signals can be wired as GPIO inputs to the
GPIO Controller function (not a part of the PCI Controller) and further presented to the
Interrupt Controller function (again, not a part of the PCI Controller) to generate an
August 2006
Order Number: 306262-004US
®
IXP46X Product Line of Network Processors
req
PCI Initiator
Interface
gnt
Arbiter
req[0]
gnt[0]
req[1]
gnt[1]
req[4:2]
gnt[4:2]
®
Intel
IXP45X and Intel
1
0
®
IXP46X Product Line of Network Processors
Figure 90
GNT_N[0]
GNT_N[3:1]
B4277-01
Develepor's Manual
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