Intel IXP45X Developer's Manual page 24

23.4 Theory of Operation ......................................................................................... 908
23.4.1 Peripheral Information........................................................................... 908
24.0 Random Number Generator ....................................................................................911
24.1 Theory of Operation ......................................................................................... 911
24.2 Detailed Register Descriptions ........................................................................... 911
24.2.1 Registers ............................................................................................. 912
24.2.1.1 Random Number FIFO.............................................................. 912
24.3 Power-Management Requirements ..................................................................... 912
24.4 Reset ............................................................................................................. 912
24.5 Error/Abnormal Conditions ................................................................................ 912
25.0 Exponentiation Acceleration Unit ...........................................................................913
25.1 Overview ........................................................................................................ 913
25.2 Feature List .................................................................................................... 913
25.3 Block Diagram................................................................................................. 914
25.3.1 Operand Restrictions ............................................................................. 914
25.3.2 EAU RAM Writes ................................................................................... 915
25.3.3 EAU RAM Reads.................................................................................... 915
25.4 Detailed Register Descriptions ........................................................................... 915
25.4.1 EAU Command Register ......................................................................... 915
25.4.2 EAU Status Register .............................................................................. 917
25.4.3 EAU Count Register............................................................................... 917
25.4.4 EAU Interrupt Register .......................................................................... 918
25.4.5 EAU RAM Registers ............................................................................... 918
25.5 Performance Requirements ............................................................................... 919
26.0 Hashing Unit (SHA) ................................................................................................921
26.1 Overview ........................................................................................................ 921
26.2 Feature List .................................................................................................... 921
26.3 Block Diagram................................................................................................. 921
26.4 Detailed Register Descriptions ........................................................................... 921
26.4.1 Hash Configuration Register ................................................................... 922
26.4.2 Hash Do Register .................................................................................. 922
26.4.3 Hash Interrupt Register ......................................................................... 923
26.4.4 Hash Chain Register .............................................................................. 923
26.4.5 Hash Data FIFO .................................................................................... 924
26.5 Compatibility................................................................................................... 924
27.0 AHB Queue Manager (AQM)....................................................................................926
27.1 Overview ........................................................................................................ 926
27.2 Feature List .................................................................................................... 926
27.3 Block Diagram................................................................................................. 927
27.4 AHB Interface ................................................................................................. 928
27.4.1 Queue Control ...................................................................................... 929
27.4.2 Queue Status ....................................................................................... 933
27.4.2.1 Status Update......................................................................... 933
27.4.2.2 Status Interrupts..................................................................... 934
27.4.3 AQM SRAM .......................................................................................... 935
27.4.4 Data Validity ........................................................................................ 936
27.4.5 Burst Operations to Queues ................................................................... 937
27.5 Detailed Register Descriptions ........................................................................... 937
27.6 Register Descriptions........................................................................................ 939
27.6.1 Queue Access Word Registers 0 - 63 ....................................................... 939
27.6.2 Queues 0-31 Status Register 0 - 3 .......................................................... 939
27.6.3 Underflow/Overflow Status Register 0 - 1................................................. 940
27.6.4 Queues 32-63 Empty Status Register ...................................................... 940
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
24
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Intel IXP45X and Intel IXP46X Product Line of Network Processors-Contents
August 2006
Order Number: 306262-004US