Expansion Bus Write (Ti* Hpi-8 Mode); Expansion Bus Read (Ti* Hpi-8 Mode) - Intel IXP45X Developer's Manual

Expansion Bus Controller—Intel
Processors
12.4.1.8.14 TI* HPI-8 Write Access
Figure 142. Expansion Bus Write (TI* HPI-8 Mode)
EX_CLK
EX_CS_N[0]
(hcs_n)
EX_ADDR[2:1]
(hcntl)
EX_BE_N[3:0]
EX_RD_N
(hr_w_n)
EX_ADDR[0]
(hbil)
EX_WR_N
(hds1_n)
EX_RDY_N
(hrdy)
EX_DATA[31:0]
(hdin)
The wave form above represents the first half of the cycle. This wave form is repeated to write the remainder of the data.
Note:
12.4.1.8.15 TI* HPI-8 Read Access
Figure 143. Expansion Bus Read (TI* HPI-8 Mode)
EX_CLK
EX_CS_N[0]
(hcs_n)
EX_ADDR[2:1]
(hcntl)
EX_BE_N[3:0]
EX_RD_N
(hr_w_n)
EX_ADDR[0]
(hbil)
EX_WR_N
(hds1_n)
EX_RDY_N
(hrdy)
EX_DATA[31:0]
(hdout)
Note: The wave form above represents the first half of the cycle. This wave form is repeated to read the remainder of the data.
August 2006
Order Number: 306262-004US
® ®
IXP45X and Intel IXP46X Product Line of Network
T1
3-4 Cycles
Valid Address
T
cs2hds1val
T1
3-4 Cycles
T
cs2hds1val
Intel
T2 T3
3-4 Cycles 2-16 Cycles
T
addsetup
Valid Byte
T
hds1_pulse
T
data_setup
Valid Data
T2 T3
3-4 Cycles 2-16 Cycles
T
addsetup
Valid Address
Valid Byte
T
hds1_pulse
T
data_setup
Valid Data
® ®
IXP45X and Intel IXP46X Product Line of Network Processors
T4 T5
3-4 Cycles 2-17 Cycles
T
recov
T
data_hold
B3936-003
T4 T5
3-4 Cycles 2-17 Cycles
T
recov
T
data_hold
B3935-003
Developer's Manual
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