Ddri Sdram Base Register Sdbr - Intel IXP45X Developer's Manual

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Memory Controller—Intel
11.6.4

DDRI SDRAM Base Register SDBR

This register indicates the beginning of SDRAM space. See
SDRAM Bank Sizes and Configurations" on page 590
two contiguous physical banks defined by SBR0 and SBR1 in the DDRI SDRAM
subsystem starting at this address.
Note: DDRI SDRAM memory space must never cross a 2 Gbyte boundary.
Note: This register should be read back after being written, before the Intel XScale processor
performs transactions which address the DDRI SDRAM.
Register Name:
Hex Offset Address:
Register Description:
Access: See below.
31 25 24
Register
Bits Name
SDRAM Base Address: These bits define the upper seven bits of the
31:2 DDRI SDRAM base address. These seven bits are compared with
5 ADDR[31:25] to determine if the internal bus transaction hits SDRAM
memory space. See
24:0
(Reserved)
0
August 2006
Order Number: 306262-004US
®
IXP45X and Intel IXP46X Product Line of Network Processors
CC00 E50CH
SDRAM Base Register
Description
Table 205.
for usage details. There can be
SDRAM Base Register - SDBR
Reset Hex Value:
(Reserved)
SDRAM Base Register - SDBR
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Section 11.2.2.2, "DDRI
0x0000 0000H
Default Access
00H RW
000000H RO
Developer's Manual
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