Ddri Sdram Boundary Register 1 Sbr1 - Intel IXP45X Developer's Manual

®
Memory Controller—Intel
11.6.6

DDRI SDRAM Boundary Register 1 SBR1

This register indicates the upper boundary of SDRAM bank 1 and its memory
technology. If bank 1 is unpopulated, SBR1[6:0] should be programmed to the value
stored in SBR0[6:0]. If bank 1 is populated, SBR1[6:0] must be programmed greater
than or equal to SBR0[6:0]. See
page 590
Note: DDRI SDRAM Memory Space must never cross a 2-Gbyte boundary.
Note: This register should be read back after being written, before the Intel XScale processor
performs transactions which address the DDRI SDRAM.
Register Name:
Hex Offset Address:
Register Description:
Access: See below.
31 30 29
Register
Bits Name
SDRAM Technology: Defines the memory subsystem technology.
• 00
31:3
• 10
0
• 11
• 01
29:0
(Reserved)
7
SDRAM Boundary: Defines the upper limit of DDRI SDRAM bank 1.
06:0
This value is compared with ADDR[30:25] to determine a bank hit or
0
miss.
August 2006
Order Number: 306262-004US
®
IXP45X and Intel IXP46X Product Line of Network Processors
for more details and programming examples.
SDRAM Boundary Register - SBR1
CC00 E514H
DDRI SDRAM Boundary Register 1
(Reserved)
SDRAM Boundary Register - SBR1
Description
128 Mbitx8/16, 256 Mbitx8, 512 Mbitx8/16, 1 Gbitx8
256 Mbitx16
1 Gbitx16
Reserved
"DDRI SDRAM Bank Sizes and Configurations" on
Reset Hex Value:
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
0x0000 0000H
07 06 00
Default Access
00 RW
2
0000000H RO
000000 RW
2
Developer's Manual
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