Relationship Of Periodic Schedule Frame Boundaries To Bus Frame Boundaries; Operation Of Frindex And Sofv (Sof Value Register) - Intel IXP45X Developer's Manual

Intel
Figure 58.

Relationship of Periodic Schedule Frame Boundaries to Bus Frame Boundaries

H-Frame boundaries for the host controller correspond to increments of
FRINDEX[13:3]. Micro-frame numbers for the H-Frame are tracked by FRINDEX[2:0].
B-Frame boundaries are visible on the high-speed bus via changes in the SOF token's
frame number. Micro-frame numbers on the high-speed bus are only derived from the
SOF token's frame number (i.e. the high-speed bus will see eight SOFs with the same
frame number value). H-Frames and B-Frames have the fixed relationship (i.e. B-
Frames lag H-Frames by one micro-frame time) illustrated in
of Periodic Schedule Frame Boundaries to Bus Frame Boundaries" on page
host controller's periodic schedule is naturally aligned to H-Frames. Software schedules
transactions for full- and low-speed periodic endpoints relative the H-Frames. The
result is these transactions execute on the high-speed bus at exactly the right time for
the USB 2.0 hub periodic pipeline. As described in
page 378, the SOF Value can be implemented as a shadow register (in this example,
called SOFV), which lags the FRINDEX register bits [13:3] by one micro-frame count.
Table 172, "Operation of FRINDEX and SOFV (SOF Value Register)" on page 424
illustrates the required relationship between the value of FRINDEX and the value of
SOFV. This lag behavior can be accomplished by incrementing FRINDEX[13:3] based on
carry-out on the 7 to 0 increment of FRINDEX[2:0] and incrementing SOFV based on
the transition of 0 to 1 of FRINDEX[2:0].
Software is allowed to write to FRINDEX.
provides the requirements that software should adhere when writing a new value in
FRINDEX.
Table 172. Operation of FRINDEX and SOFV (SOF Value Register) (Sheet 1 of 2)
FRINDEX[F]
N
N+1
N+1
N+1
N+1
Note: Where [F] = [13:3]; [μF] = [2:0]
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
424
® ®
IXP45X and Intel IXP46X Product Line of Network Processors—USB 2.0 Host Controller
Interface Data
Structure
Current
SOFV FRINDEX[?F]
N 111b
N 000b
N+1 001b
N+1 010b
N+1 011b
Interface Data
Structure
Figure 58, "Relationship
Section 9.12.4, "FRINDEX" on
Section 9.12.4, "FRINDEX" on page 378
Next
FRINDEX[F] SOFV
N+1 N
N+1 N+1
N+1 N+1
N+1 N+1
N+1 N+1
Order Number: 306262-004US
B4501-01
424. The
FRINDEX[?F]
000b
001b
010b
011b
100b
August 2006