Gpio Output Enable Register - Intel IXP45X Developer's Manual

Register Name:
Physical Address:
Register Description:
Access: Read/Write
3
1
(Reserved)
Register
Bits Name
[31: 16 (Reserved) Reads back 0
1 = Output a 1 on output pin, depends on GPCLKR24, GPOER15
15 DO15
0 = Output a 0 on output pin, depends on GPCLKR24, GPOER15
1 = Output a 1 on output pin, depends on GPCLKR8, GPOER14
14 DO14
0 = Output a 0 on output pin, depends on GPCLKR8, GPOER14
1 = Output a 1 on output pin, depends on GPDBSELR2, GPOER[13:9]
13:9 DO13:DO9
0 = Output a 0 on output pin, depends on GPDBSELR2, GPOER[13:9]
1 = Output a 1 on output pin, depends on testmode_data, GPOER[8]
8 DO8
0 = Output a 0 on output pin, depends on testmode_data, GPOER[8]
1 = Output a 1 on output pin GPOER[7:0]
7:0 DO7:DO0
0 = Output a 0 on output pin GPOER[7:0]
15.5.2

GPIO Output Enable Register

Each pin's output tri-state buffer is controlled by programming this register. Each of the
16 bits in the register represents the control to the tri-state buffer of the output pin.
The register is read and written to through the APB interface on the rising edge of
apb_pclk.
Register Name:
Physical Address:
Register Description:
Access: Read/Write
3
1
(Reserved)
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
780
® ®
Intel IXP45X and Intel
0xC8004000
I/O Output register. Controls output value of GPIO pins, depending on tri-state
control from GPOER.
Description
0xC8004004
I/O Output Enable register. Turns on output driver.
IXP46X Product Line of Network Processors—GPIO Controller
GPOUTR
Reset Hex Value:
1 1
6 5
GPOUTR
GPOER
Reset Hex Value:
1 1
6 5
0x00000000
8 7
Reset Value Access
0x0 RO
0 RW
0 RW
0 RW
0 RW
0 RW
0x00007FFF
8 7
August 2006
Reference Number: 306262-004US
0
0