Interrupt Controller—Intel
17.6.2
Interrupt Enable Register
Register Name:
0xC800 3004
Physical Address:
Provides enables for the interrupts. This register allows the Intel XScale
Register
disable interrupts from selected blocks.
Description:
To enable an interrupt, a 1 is written into corresponding bit, to disable it, a 0 is written.
Access: Read/Write.
31
Register Name:
0xC800 3024
Physical Address:
Provides enables for the interrupts. This register allows the Intel XScale
Register
from selected blocks.
Description:
To enable an interrupt, a 1 is written into corresponding bit, to disable it, a 0 is written.
Access: Read/Write.
31
17.6.3
Interrupt Select Register
Register Name:
0xC800 3008
Physical Address:
This register decides if an interrupt is to be presented to the Intel XScale
Register
FIQ or an IRQ. If a bit corresponding to an interrupt is set (to 1), that interrupt is presented
Description:
as a FIQ. If the bit is reset to 0, the interrupt is presented as an IRQ.
Access: Read/Write.
31
Register Name:
0xC800 3028
Physical Address:
This register decides if an interrupt is to be presented to the Intel XScale
Register
FIQ or an IRQ. If a bit corresponding to an interrupt is set (to 1), that interrupt is presented
Description:
as a FIQ. If the bit is reset to 0, the interrupt is presented as an IRQ.
Access: Read/Write.
31
August 2006
Reference Number: 306262-004US
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors
Interrupt Enables[31:0]
Interrupt Enables[63:32]
Interrupt Selects[31:0]
Interrupt Selects[63:32]
INTR_EN
0x00000000
Reset Hex Value:
INTR_EN2
0x00000000
Reset Hex Value:
INTR_SEL
0x00000000
Reset Hex Value:
INTR_SEL2
0x00000000
Reset Hex Value:
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
®
Processor to
®
Processor to disable interrupts
®
Processor as an
®
Processor as an
Developer's Manual
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