Ddri Sdram Address Register Summary; Address Decoding For Ddri Sdram Memory Banks; Programming Codes For The Ddri Sdram Bank Size - Intel IXP45X Developer's Manual

®
Memory Controller—Intel
Table 204.

DDRI SDRAM Address Register Summary

DDRI SDRAM Address Register
DDRI SDRAM Base Register (SDBR)
DDRI SDRAM Boundary Register 0 (SBR0)
DDRI SDRAM Boundary Register 1 (SBR1)
DDRI SDRAM 32-Bit Size Register (S32SR)
Note: DDRI SDRAM memory space must be aligned to a 32-Mbyte boundary and must never
cross a 2-Gbyte boundary.
Note: With 32-bit DDRI SDRAM attached to the IXP45X/IXP46X network processors, all DDRI
SDRAM memory space behaves as 32-bit DDRI SDRAM and the value in S32SR is
ignored.
The base register defines the upper seven address bits of the DDRI SDRAM memory
space. The boundary registers define the address limits for each DDRI SDRAM bank in
32 Mbyte granularity.
activate a DDRI SDRAM memory bank.
Table 205.

Address Decoding for DDRI SDRAM Memory Banks

ADDR[31] is not equal to the SDBR[31]
ADDR[31] is equal to the SDBR[31]
AD[30:25] is greater than or equal to the SDBR[30:25]
AD[30:25] is less than the value in SBR0
ADDR[31] is equal to the SDBR[31]
AD[30:25] is greater than or equal to the value in SBR0
AD[30:25] is less than the value in SBR1
ADDR[31] is equal to the SDBR[31]
AD[30:25] is greater than or equal to the value in SBR1
Table 206
Table 206.

Programming Codes for the DDRI SDRAM Bank Size

Bank Size
32 Mbyte
64 Mbyte
128 Mbyte
encoding. These Bank Size Codes are used in the calculation of the DDRI SDRAM
boundary registers programming values.
equations to calculate the programming values for the DDRI SDRAM boundary
registers.
Note: For IXP45X/IXP46X network processors, both banks must be programmed to be the
same size.
August 2006
Order Number: 306262-004US
®
IXP45X and Intel IXP46X Product Line of Network Processors
Table 205
Condition
shows the correct programming values for the DDRI SDRAM Bank Size
Code
Empty
The lowest address for DDRI SDRAM memory space aligned to a
32-Mbyte boundary.
The upper address boundary for bank 0 of DDRI SDRAM memory
space. SBR0 must be greater than or equal to the value of
SDBR[30:25].
The upper address boundary for bank 1 of DDRI SDRAM memory
space. SBR1 must be greater than or equal to SBR0.
The size for the memory space to operate as 32-bit memory (in
MBs). S32SR must be less than, or equal to 1/2 of bank 0 size.
Ignored with a 32-bit data bus width.
defines the conditions which must be satisfied to
None
Bank 0
Bank 1
None
Bank Size
00H 256 Mbyte
01H 512 Mbyte
02H 1 Gbyte
04H
Equation 1 and
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Definition
DDRI SDRAM Bank Selected
Code
08H
10H
20H
Equation 2 show the required
Developer's Manual
591