Npe Error Handling Illustration; Npe Coprocessor Error - Intel IXP45X Developer's Manual

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Error Handling—Intel IXP45X and Intel
Table 298 on page 953
to each NPE contained within the IXP45X/IXP46X network processors.
Table 298.

NPE Coprocessor Error

NPE
NPE A
NPE B
NPE C
Figure 209 on page 953
to the Intel XScale
coprocessors. Each of these errors; NPE IMEM Parity error, NPE DMEM Parity error and
NPE Coprocessor error can be individually masked through control bits as described
below. The response of the coprocessors on an occurrence of an error can be controlled
by ERR_EN control bit as described below.
Figure 209. NPE Error Handling Illustration
Switching
Coprocessor
ERR_EN
Coprocessor
Other
Coprocessors
EEE
DPE
IPE
EEE - Control bit to enable stop and interrupt on NPE Coprocessor error. This bit
defaults to zero on reset. It is bit 18 of the NPE Core Configuration Bus Control
Register.
DPE - Control bit to enable the NPE Core to stop and interrupt on NPE DMEM parity
error. It defaults to zero on reset. It is bit 19 of the NPE Core Configuration Bus Control
Register.
IPE - Control bit to enable the NPE Core to stop and interrupt on NPE IMEM parity
error. It defaults to zero on reset. It is bit 20 of the NPE Core Configuration Bus Control
Register.
August 2006
Order Number: 306262-004US
®
IXP46X Product Line of Network Processors
displays the types of coprocessor errors that can be generated
Defined Coprocessor Errors
AHB error
AHB error, SWCP Parity error
AHB error
shows how the different types of errors generate the interrupt
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Processor and how the errors are communicated back to the
swcp_parity_err
AHB ahb_err
DMEM Parity Error
DMEM
IMEM Parity Error
IMEM
OR
AND
AND
AND
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
swcp_interrupt
NPE Error
OR
npe_interrupt
B4227-001
Developer's Manual
953