Microprocessor Interface; Microprocessor Interface Block Diagram - Intel IXP45X Developer's Manual

USB 2.0 Host Controller—Intel
9.6.3.2

Microprocessor Interface

Figure 41.

Microprocessor Interface Block Diagram

BVCI/AMBA to Async bus
BVCI/AMBA
Bus
Vusb_hs_up_int_busif_[bvci|amba]
The microprocessor interface block provides an AMBA target (slave) interface on the
AHB. A simple synchronous bus interface signaling is used for the microprocessor bus
allowing the core to be easily connected to the system bus.
The Microprocessor interface block contains all the control and status registers that
allow a processor to interface to the USB Host core. These registers allow a
microprocessor to control the configuration of the core, ascertain the capabilities of the
core and control the core in operation for host mode.
Two groups of registers exist in the interface. The USB host controller registers are
compatible with the USB host controller registers defined in the Intel™ EHCI
specification.
August 2006
Order Number: 306262--, Revision: 004US
® ®
IXP45X and Intel IXP46X Product Line of Network Processors
converter
A Bus
Vusb_hs_up_int_regfile
Bus Bridge
Sub "A-busses" for:
Vusb_hs_dma_up_int
Vusb_hs_pe_{otg,dev}
Vusb_hs_portctrl
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Interrupt
Interrupt
triggers from
Controller
other blocks
Register Bits
Glue Logic, etc.
Various control
signals
to/from other blocks
Developer's Manual
B4199-01
359