Programming Values For The Ddri Sdram 32-Bit Size Register (S32Sr[29:20]) - Intel IXP45X Developer's Manual

Network processors
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Equation 1. Programming Value for DDRI SDRAM Boundary Register 0 (SBR0[6:0])
SBR0[6:0] = Bank 0 Size Code+ SDBR[30:25]
Equation 2. Programming Value for DDRI SDRAM Boundary Register1 (SBR1[6:0])
SBR1[6:0] = Bank 1 Size Code + SBR0[6:0]
Table 207
Table 207.
Programming Values for the DDRI SDRAM 32-bit Size Register
(S32SR[29:20])*
32-bit Region Size
Note:
For the IXP45X/IXP46X network processors, this is always programmed to 0.
Register.
Example 21. Address Register Programming Example (Default Mode for IXP45X/IXP46X
network processors)
The user wants to program the DDRI SDRAM memory space to begin at 0000 0000H.
Bank 0 is 128 Mbyte and Bank 1 is 128 Mbyte yielding a total memory of 256 Mbytes.
All the memory is programmed for 32-bit mode, so there is no special 32-bit region
using S32SR register. The memory space summary is:
The registers would be programmed as follows:
• Bank 0 Size = 128MB, code = 000100
• Bank 1 Size = 128MB, code = 000100
• SDBR =0000 0000H, SDBR[30:25] = 000000
• SBR0[6:0] = 0000100
• SBR1[6:0] = 0001000
• S32SR[29:20] = 000H, S32SR = 0000 0000H (same as default value)
Additionally, the following registers also need to be programmed before using the DDRI
DDRI SDRAM Control Register 0 SDCR0
DDRI SDRAM Control Register 1 SDCR1
ECC Control Register ECCR
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
Developer's Manual
592
®
®
Intel
IXP45X and Intel
shows the correct programming values for the 32-bit DDRI SDRAM Size
S32SR[29:20]
Empty
000H
1 M
001H
2 M
002H
4 M
004H
8 M
008H
16 M
010H
Memory Space Limit
DDRI SDRAM Base
32-Bit Region Top (end 32-bit region)
Invalid Region Top (start 64-bit region)
= 08H (size of Bank 0)
2
= 10H (size of Bank 0 + size of Bank 1)
2
IXP46X Product Line of Network Processors—Memory Controller
32-bit Region Size
32 M
6 4M
128 M
256 M
512 M
(reserved)
Bank 0 Top
Bank 1 Top
2
2
2
- Program according JEDEC specs.
- Program according JEDEC specs.
- Program only if ECC is enabled
S32SR[29:20]
020H
040H
080H
100H
200H
all other values
Address
0000 0000H
N/A
N/A
07FF FFFFH
0FFF FFFFH
August 2006
Order Number: 306262-004US

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