Register Summary; Register Legend; Gpio Output Register; Detailed Register Descriptions - Intel IXP45X Developer's Manual

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GPIO Controller—Intel IXP45X and Intel
The clock generation logic is reset using an early reset, early_reset_n – this reset is de-
asserted prior to system reset being de-asserted. This ensures that GPIO15 provides a
clock out while system reset is still asserted.
15.4.3

APB Interface

The GPIO block interfaces to the Advanced Peripheral Bus, APB. The AHB/APB Bridge
provides the interface timing/signals required. Refer to the AMBA Rev 2.0 specification
for a detailed description on the Advanced Micro controller Bus Architecture. The GPIO
block responds to 8, 16, and 32 bit reads and writes.
15.5

Detailed Register Descriptions

Table 252.

Register Legend

Attribute
RV
PR
RS
RW
RW1C
Table 253.

Register Summary

Apb_paddr
[31:0]
"0xC8004000"
"0xC8004004"
"0xC8004008"
"0xC800400C"
"0xC8004010"
"0xC8004014"
"0xC8004018"
The internal registers are accessed through the APB interface.
registers.
15.5.1

GPIO Output Register

Each pin's output data is controlled by programming this register. Each of the 16 bits in
the register represents the data to be put on the output through a tri-state buffer,
depending upon the status of the GPOER. The register is read and written to through
the APB interface on the rising edge of apb_pclk.
August 2006
Reference Number: 306262-004US
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IXP46X Product Line of Network Processors
Legend Attribute
Reserved RC
Preserved RO
Read/Set WO
Read/Write NA
Normal Read
RW1S
Write '1' to clear
Register Name
GPOUTR GPIO pin data output register
GPOER GPIO pin out enable register
GPINR GPIO pin status register
GPISR GPIO interrupt status register
GPIT1R GPIO interrupt type register, inputs 7:0
GPIO pin interrupt type register, inputs
GPIT2R
15:8
GPCLKR GPIO Clock Control Register
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Intel
Legend
Read Clear
Read Only
Write Only
Not Accessible
Normal Read
Write '1' to set
Description
®
IXP45X and Intel IXP46X Product Line of Network Processors
Reset Value Attribute
"0x00000000" RW
"0x00007FFF" RW
"0x00000000" RO
"0x00000000" RW1C
"0x00000000" RW
"0x00000000" RW
"0x01100000" RW
Table 253 presents the
Developer's Manual
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