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USB 2.0 Host Controller—Intel
considered for execution of bus transactions. The host controller continues executing in
Recovery Path mode until it encounters a Restore FSTN or it determines that it has
reached the end of the micro-frame (see details in the list below).
The rules for schedule traversal and limited execution while in Recovery Path mode are:
• Always follow the Normal Path Link Pointer when it encounters an FSTN that is a
Save-Place indicator. The host controller must not recursively follow Save-Place
FSTNs. Therefore, while executing in Recovery Path mode, it must never follow an
FSTN's Back Path Link Pointer.
• Do not process an siTD or, iTD data structure. Simply follow its Next Link Pointer.
• Do not process a QH (Queue Head) whose EPS field indicates a high-speed device.
Simply follow its Horizontal Link Pointer.
• When a QH's EPS field indicates a Full/Low-speed device, the host controller will
only consider it for execution if its SplitXState is DoComplete (note: this applies
whether the PID Code indicates an IN or an OUT). See
Transaction" on page 444
Transfers" on page 461
in general for the host controller to issue a bus transaction. Note that the host
controller must not execute a Start-split transaction while executing in Recovery
Path mode. See
handling when in Recovery Path mode.
• Stop traversing the recovery path when it encounters an FSTN that is a Restore
indicator. The host controller unconditionally uses the saved value of the Save-
Place FSTN's Normal Path Link Pointer when returning to the normal path traversal.
The host controller must clear the context of executing a Recovery Path when it
restores schedule traversal to the Save-Place FSTN's Normal Path Link Pointer.
If the host controller determines that there is not enough time left in the micro-frame
to complete processing of the periodic schedule, it abandons traversal of the recovery
path, and clears the context of executing a recovery path. The result is that at the start
of the next consecutive micro-frame, the host controller starts traversal at the frame
list.
An example traversal of a periodic schedule that includes FSTNs is illustrated in
Figure
70.
Figure 70.
Example Host Controller Traversal of Recovery Path via FSTNs
Frame Numbers
N+5
8
7
N+4
8
6
N+3
8
5
Normal Transversal
8
for Frame N+1
4
Micro-franes 0, 1
8
N+1
3.0
N
8
2.0
Normal Transversal
for Frame N
8
N-1
1
N-2
8
0
August 2006
Order Number: 306262--, Revision: 004US
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors
and
for a complete list of additional conditions that must be met
"Periodic Interrupt - Do Complete Split" on page 464
Save N
N-ptr
8
8
3.1
3.2
B-ptr
T-bit=0
8
8
8
2.0
2.1
2.2
Intel
"Tracking Split Transaction Progress for Interrupt
4
3
4
2
4
1
4
0
Recovery Path Traversal
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors
Section 9.14.10.3, "Execute
for special
2
1
N-ptr
1
T-bit=1
0
B-ptrE
Restore-N
2
0
Causes 'restore' to
Normal path
traversal
B4513-01
Developer's Manual
459
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