Universal Asynchronous Receiver-Transmitter (Uart) - Intel IXP45X Developer's Manual

Universal Asynchronous Receiver-Transmitter (UART)—Intel
Product Line of Network Processors
14.0 Universal Asynchronous Receiver-Transmitter
(UART)
14.1 Overview
The Intel
Universal Asynchronous Receiver-Transmitter (UART) interfaces. One UART is intended
primarily to support debug and control functions. The other UART is primarily intended
to support connection to high-speed serial devices, such as Bluetooth.
Each UART supports four pins:
• Transmit Data
• Receive Data
• Request to Send
• Clear to Send
The UARTs performs serial-to-parallel conversion — on data characters received from a
peripheral device or a modem — and parallel-to-serial conversion — on data characters
received from the Intel XScale processor.
The Intel XScale processor, within the IXP45X/IXP46X network processors, can read
the complete status of the UART at any time during functional operation. Available
status information includes the type and condition of the transfer operations being
performed by the UART, as well as any detected error conditions (such as parity,
overrun, framing, or break interrupt).
The UART has enhancements in place to support higher speeds than defined by the
16550 UART specification.
containing five, six, seven, or eight data bits. The data transfers may be configured to
have one or two stop bits and supports even, odd, or no parity.
Figure 183
UART transmit and receive lines. Notice that Data bits 5 through 7, the Parity Bit, and
Stop Bit 2 are shaded. The Data bits 5 through 7, Parity Bit, and Stop Bit 2 are all
programmable and optional as previously described.
August 2006
Order Number: 306262-004US
® ®
IXP45X and Intel IXP46X Product Line of Network Processors supports two
The UARTs are capable of supporting data transfers
shows a functional waveform of the data that could be contained on the
® ®
IXP45X and Intel
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
IXP46X
Developer's Manual
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