Timestamp Configuration Register; Timestamp Prescale Register - Intel IXP45X Developer's Manual

Operating System Timer—Intel
18.5.11

Timestamp Configuration Register

Register Name:
Physical Address:
Register Description:
Access: Read/Write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits Name
31:2 (Reserved)
1 ts_pause_en
0 ts_scale_en
18.5.12

Timestamp Prescale Register

Register Name:
Physical Address:
Register Description:
Access: Read/Write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
(Reserved)
Register
Bits Name
31:1
(Reserved)
6
Contains the divide factor for the Timestamp Timer. The usable range
15:0 ts_presc is 2 - 65,535. The generated frequency equals apb_clk divided by the
divide factor. The prescaling starts when the field is written.
August 2006
Order Number: 306262-004US
® ®
IXP45X and Intel IXP46X Product Line of Network Processors
0xC8005028
Timestamp Configuration Register
(Reserved)
If '0' the timestamp counter is running, when '1' the counter is
paused.
Only when the prescale/scale_en is active. This bit has no effect if the
timer is not using the prescaler/scale_en
If this field is '1', the 20-ns scale is enabled. It will make timestamp
timer count with 3/4 of the frequency the timestamp timer is driven
by. If no prescaler is used apb_clk.
0xC800502C
Timestamp Prescale Register
Description
ost_ts_cfg
Reset Hex Value:
ost_ts_cfg
Description
ost_ts_pre
Reset Hex Value:
ost_ts_pre
® ®
Intel IXP45X and Intel
0x00000000
8 7 6 5 4 3
Reset
Value
30'd0
0
0
0x00000000
8 7 6 5 4 3
ts_presc
Reset
Value
16'h0000
16'h0000
IXP46X Product Line of Network Processors
Developer's Manual
2 1 0
Access
RO
RW
RW
2 1 0
Access
RO
RW
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