Ethernet Mac 0 On Npe B; Register Legend - Intel IXP45X Developer's Manual

Table 100.

Register Legend

Attribute
RV
PR
RS
RW
RW1C
All of the Ethernet internal configuration and control registers are directly readable and
writable by the Intel XScale processor via APB bus. All registers for all MII interfaces
will match the detailed register descriptions contained in this chapter.
6.2.1

Ethernet MAC 0 on NPE B

Table 101. Ethernet MAC 0 on NPE B (Sheet 1 of 2)
Address
0xC800 9000
0xC800 9004
0xC800 9010
0xC800 9014
0xC800 9020
0xC800 9030
0xC800 9038
0xC800 9040
0xC800 9050
0xC800 9054
0xC800 9060
0xC800 9064
0xC800 9070
0xC800 9080
0xC800 9084
0xC800 9088
0xC800 908C
0xC800 9090
0xC800 9094
0xC800 9098
0xC800 909C
0xC800 90A0
0xC800 90A4
0xC800 90A8
0xC800 90AC
0xC800 90B0
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Developer's Manual
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Intel IXP45X and Intel
Legend
Reserved RC
Preserved RO
Read/Set WO
Read/Write NA
Normal Read
RW1S
Write '1' to clear
Transmit Control 1
Transmit Control 2
Receive Control 1
Receive Control 2
Random Seed
Threshold For Partial Empty
Threshold For Partial Full
Buffer Size For Transmit
Transmit Single Deferral Parameters
Receive Deferral Parameters
Transmit Two Part Deferral Parameters 1
Transmit Two Part Deferral Parameters 2
Slot Time
MDIO Command 1
MDIO Command 2
MDIO Command 3
MDIO Command 4
MDIO Status 1
MDIO Status 2
MDIO Status 3
MDIO Status 4
Address Mask 1
Address Mask 2
Address Mask 3
Address Mask 4
Address Mask 5
IXP46X Product Line of Network Processors—Ethernet MACs
Attribute Legend
Read Clear
Read Only
Write Only
Not Accessible
Normal Read
Write '1' to set
Description
August 2006
Order Number: 306262-004US