Mia{<Cond>} Acc0, Rm, Rs; Miaph{<Cond>} Acc0, Rm, Rs - Intel IXP45X Developer's Manual

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Intel XScale Processor—Intel
Table 66. MIA{<cond>} acc0, Rm, Rs
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
cond
Operation: if ConditionPassed(<cond>) then
Exceptions: none
Qualifiers Condition Code
Notes:
The MIA instruction operates similarly to MLA except that the 40-bit accumulator is
used. MIA multiplies the signed value in register Rs (multiplier) by the signed value in
register Rm (multiplicand) and then adds the result to the 40-bit accumulator (acc0).
MIA does not support unsigned multiplication; all values in Rs and Rm will be
interpreted as signed data values. MIA is useful for operating on signed 16-bit data
that was loaded into a general-purpose register by LDRSH.
The instruction is only executed if the condition specified in the instruction matches the
condition code status.
Table 67. MIAPH{<cond>} acc0, Rm, Rs
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
cond
Operation: if ConditionPassed(<cond>) then
Exceptions: none
Qualifiers Condition Code
Notes:
August 2006
Order Number: 306262-004US
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IXP45X and Intel IXP46X Product Line of Network Processors
1 1 1 0 0 0 1 0 0
acc0 = (Rm[31:0] * Rs[31:0])[39:0] + acc0[39:0]
No condition code flags are updated
Early termination is supported. Instruction timings can be found
in "Multiply Instruction Timings" on page
Specifying R15 for register Rs or Rm has unpredictable results.
acc0 is defined to be 0b000 on Intel XScale processor.
1 1 1 0 0 0 1 0 1
acc0 = sign_extend(Rm[31:16] * Rs[31:16]) +
sign_extend(Rm[15:0] * Rs[15:0]) +
acc0[39:0]
S bit is always cleared; no condition code flags are updated
Instruction timings can be found
in "Multiply Instruction Timings" on page
Specifying R15 for register Rs or Rm has unpredictable results.
acc0 is defined to be 0b000 on Intel XScale processor
Intel
0 0 0 Rs 0 0
185.
0 0 0 Rs 0 0
185.
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IXP45X and Intel IXP46X Product Line of Network Processors
8 7 6 5 4 3 2 1
0 0 0 0 0 1 Rm
8 7 6 5 4 3 2 1
0 0 0 0 0 1 Rm
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