6.2.24
MDIO Command 4
Register Name:
0x C800908C
Hex Offset Address:
Register
MDIO Command Register
Description:
Access: Read/Write.
31 30
Bits
31
30:27
26
25:21
20:16
15:0
6.2.25
MDIO Status Registers
Four registers make up the 32-bit MDIO status:
• MDIO Status[31:24] — MDIO Status 4
• MDIO Status[23:16] — MDIO Status 3
• MDIO Status[15:8] — MDIO Status 2
• MDIO Status[7:0] — MDIO Status 1
The detailed bit descriptions follow the four registers' bit maps.
6.2.26
MDIO Status 1
Register Name:
0x C8009090
Hex Offset Address:
Register
MDIO Status Register
Description:
Access: Read Only.
31
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
Developer's Manual
256
®
®
Intel
IXP45X and Intel
(Reserved)
Register
Name
Application logic sets this to 1 to start the MDIO access. This bit remains 1
Go
during the access. When the access is finished, the Ethernet core resets this bit
to 0.
(Reserved)
1 = MDIO write access
MDIO Write
0 = MDIO read access.
PHY address
Physical address of the PHY to be accessed.
PHY Register
Register number of the PHY Register to be accessed.
Write data
Write data on MDIO write accesses.
(Reserved)
IXP46X Product Line of Network Processors—Ethernet MACs
mdiocm4
0x00000000
Reset Hex Value:
MDIO Command
Description
mdiosts1
0x00000000
Reset Hex Value:
8
7
MDIO_COMMAND[31:24]
8
7
MDIO_STATUS[7:0]
August 2006
Order Number: 306262-004US
0
0
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