Seldcsr Data Register - Intel IXP45X Developer's Manual

Intel
Update_DR parallel loads the new DCSR value into DBG_REG[33:2]. This value is then
loaded into the actual DCSR register. All bits defined as JTAG writable in
"Debug Control and Status Register (DCSR)" on page 113
An external host and the debug handler running on the IXP45X/IXP46X network
processors must synchronize access the DCSR. If one side writes the DCSR at the same
side the other side reads the DCSR, the results are unpredictable.
Figure 14.

SELDCSR Data Register

TDI
3.6.11.2.1 DBG.HLD_RST
The debugger uses DBG.HLD_RST when loading code into the instruction cache during
a processor reset. Details about loading code into the instruction cache are in
"Downloading Code in ICache" on page
The debugger must set DBG.HLD_RST before or during assertion of the reset pin. Once
DBG.HLD_RST is set, the reset pin can be de-asserted, and the processor will internally
remain in reset. The debugger can then load debug handler code into the instruction
cache before the processor begins executing any code.
Once the code download is complete, the debugger must clear DBG.HLD_RST. This
takes the processor out of reset, and execution begins at the reset vector.
A debugger sets DBG.HLD_RST in one of two ways:
• Either by taking the JTAG state machine into the Capture_DR state, which
automatically loads DBG_SR[1] with '1', then the Exit2 state, followed by the
Update_Dr state. This will set the DBG.HLD_RST, clear DBG.BRK, and leave the
DCSR unchanged (the DCSR bits captured in DBG_SR[34:3] are written back to the
DCSR on the Update_DR).
• Alternatively, a '1' can be scanned into DBG_SR[1], with the appropriate value
scanned in for the DCSR and DBG.BRK.
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
126
® ®
IXP45X and Intel IXP46X Product Line of Network Processors—Intel XScale
0
DBG_SR
35 34
ignored
DBG_REG
34 33
TCK
are updated.
DCSR
0 1
3 2 1
2 1 0
139.
®
Processor
Table 35,
Capture_DR
0
TDO
0
Update_DR
DBG.HLD_RST
DBG.BRK
DBG.DCSR
B4340-01
August 2006
Order Number: 306262-004US