Bit Encoding; Usb States - Intel IXP45X Developer's Manual

USB 1.1 Device Controller—Intel
Processors
By decoding the polarity of the UDC+ and UDC- pins and using differential data, four
distinct states are represented. Two of the four states are used to represent data. A 1
indicates that UDC+ is high and UDC- is low. A 0 indicates that UDC+ is low and UDC-
is high. The two remaining states and pairings of the four encodings are further
decoded to represent the current state of the USB.
Table 108
Table 108.

USB States

Bus State
Idle
Suspend
Resume
Start of Packet
End of Packet
Disconnect
Connect
Reset
USB Hosts and USB hubs have pull-down resistors on both the D+ and D- lines. When
a device is not attached to the cable, the pull-down resistors cause D+ and D- to be
pulled down below the single-ended low threshold of the USB host or USB hub. This
creates a state called single-ended zero (SE0). A disconnect is detected by the USB
host when an SE0 persists for more than 2.5 µs (30-bit times). When the UDC is
connected to the USB cable, the pull-up resistor on the UDC+ pin causes D+ to be
pulled above the single-ended high threshold level. After 2.5 µs elapse, the USB host
detects a connect.
After the USB Host detects a Connect, the bus is in the idle state because UDC+ is high
and UDC- is low. The bus transitions from the Idle state to the Resume state (a 1-to-0
transition) to signal the Start of Packet (SOP). Each USB packet begins with a Sync field
that starts with the 1-to-0 transition.
After the packet data is transferred, the bus signals the End of Packet (EOP) state by
pulling both UDC+ and UDC- low for 2 bit times, followed by an Idle state for 1 bit time.
If the idle persists for more than 3 ms, the UDC enters Suspend state. The USB Host
can awaken the UDC from the Suspend state by signalling a reset or by switching the
bus to the resume state via normal bus activity. Under normal operating conditions, the
USB host periodically signals an Start of Frame (SOF) to ensure that devices do not
enter the suspend state.
8.3.2

Bit Encoding

USB uses non-return to zero inverted (NRZI) to encode individual bits. Both the clock
and the data are encoded and transmitted within the same signal. Instead of
representing data by controlling the state of the signal, transitions are used. A 0 is
represented by a transition, and a 1 is represented by no transition (this produces the
data).
August 2006
Order Number: 306262--, Revision: 004US
® ®
IXP45X and Intel IXP46X Product Line of Network
shows how differential signalling represents eight different bus states.
UDC+ high, UDC- low (same as a 1).
Idle state for more than 3 ms.
UDC+ low, UDC- high (same as a 0).
Transition from idle to resume.
UDC+ AND UDC- low for 2-bit times followed by an idle for 1-bit time.
UDC+ AND UDC- below single-ended low threshold for more than 2.5 µs.
(Disconnect is the static bus condition that results when no device is plugged into a hub
port.)
UDC+ OR UDC- high for more than 2.5 µs.
UDC+ AND UDC- low for more than 2.5 µs. (Reset is driven by the USB host controller
and sensed by a device controller.)
UDC+/UDC- Pin Levels
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
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