Ddri Sdram Initialization Register Sdir - Intel IXP45X Developer's Manual

11.6.1

DDRI SDRAM Initialization Register SDIR

The DDRI SDRAM Initialization Register (SDIR) is responsible for programming the
operation of the DDRI SDRAM device state machines. The SDIR provides a method for
software to execute the DDRI SDRAM initialization sequence (see
Initialization" on page
Register Name:
Hex Offset Address:
Register Description:
Access: See below.
31
Register
Bits Name
31:0
(Reserved)
4
Special DDRI SDRAM Command: These bits are used for DDRI
SDRAM initialization. See
details. While not in the initialization sequence, these bits must be set
to 1xxx
Table 211, "DDRI SDRAM Commands" on page
• 0000
• 0001
• 0010
03:0
0
• 0011
• 0100
• 0101
• 0110
• Others - Normal DDRI SDRAM Operation
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
632
® ®
Intel IXP45X and Intel
598).
DDRI SDRAM Initialization Register - SDIR
CC00 E500H
DDRI SDRAM Initialization Register
(Reserved)
DDRI SDRAM Initialization Register - SDIR
Description
"DDRI SDRAM Initialization" on page 598
. For details on the exact DDRI SDRAM commands, refer to
2
- Mode-Register-Set Command where DLL is not Reset
2
and CAS Latency as specified in SDCR0
- Mode-Register-Set Command where DLL is Reset and
2
CAS Latency and Burst Length of four
- Precharge-All Command: The MCU issues one
2
precharge-all
command to the DDRI SDRAM devices.
- NOP Command: The MCU issues one
2
to the DDRI SDRAM devices.
- Extended Mode-Register Set (EMRS) Command
2
where DLL is enabled on the DDRI SDRAM devices.
- Extended Mode-Register Set (EMRS) Command
2
where DLL is disabled on the DDRI SDRAM devices.
- Auto-Refresh Command: The MCU issues one refresh
2
sequence (i.e. precharge-all followed by auto-refresh command)
to the DDRI SDRAM devices.
IXP46X Product Line of Network Processors—Memory Controller
Reset Hex Value:
598.
NOP
command
"DDRI SDRAM
0x0000 000FH
4 3
Default Access
0 RO
for
1111 RW
2
August 2006
Order Number: 306262-004US
0