Host Controller Asynchronous Schedule Split-Transaction State Machine - Intel IXP45X Developer's Manual

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Figure 67.

Host Controller Asynchronous Schedule Split-Transaction State Machine

CERR goes
to zero
Decrement Error
Count (CERR)
9.14.12.1.1 Asynchronous — Do Start Split
This is the state which software must initialize a full- or low-speed asynchronous queue
head. This state is entered from the Do Complete Split state only after a complete-
split transaction receives a valid response from the transaction translator that is not a
Nyet handshake.
For queue heads in this state, the host controller will execute a start-split transaction to
the appropriate transaction translator. If the bus transaction completes without an error
and PidCode indicates an IN or OUT transaction, then the host controller will reload the
error counter (CErr). If it is a successful bus transaction and the PidCode indicates a
SETUP, the host controller will not reload the error counter. If the transaction translator
responds with a Nak, the queue head is left in this state, and the host controller
proceeds to the next queue head in the asynchronous schedule.
If the host controller times out the transaction (no response, or bad response) the host
controller decrements Cerr and proceeds to the next queue head in the asynchronous
schedule.
9.14.12.1.2 Asynchronous — Do Complete Split
This state is entered from the Do Start Split state only after a start-split transaction
receives an Ack handshake from the transaction translator.
For queue heads in this state, the host controller will execute a complete-split
transaction to the appropriate transaction translator. If the transaction translator
responds with a Nyet handshake, the queue head is left in this state, the error counter
is reset and the host controller proceeds to the next queue head in the asynchronous
schedule. When a Nyet handshake is received for a bus transaction where the queue
head's PidCode indicates an IN or OUT, the host controller will reload the error counter
(CErr). When a Nyet handshake is received for a complete-split bus transaction where
the queue head's PidCode indicates a SETUP, the host controller must not adjust the
value of CErr.
Independent of PIDCode, the following responses have the effects:
• Transaction Error (XactErr). Timeout or data CRC failure, etc. The error counter
(Cerr) is decremented by one and the complete split transaction is immediately
retried (if possible). If there is not enough time in the micro-frame to execute the
retry, the host controller MUST ensure that the next time the host controller begins
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
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IXP45X and Intel IXP46X Product Line of Network Processors—USB 2.0 Host Controller
Endpoint Halt
NaK
Do Start
XactErr
Split
Endpoint Active
AcK
Nyet
Do
Complete
Split
!XactErr
XactErr
.and.
NaK
!NYET
.and.
.and.
PidCode .eq. SETUP
!Stall
Endpoint Halt
CERR goes
to zero
Stall
Decrement Error
Count (CERR)
and
Do immediate
retry
of complete-split
Set XactErr bit and
Decrement Error Count
(CERR)
B4510-01
August 2006
Order Number: 306262-004US