General-Purpose Timers Operation - Intel IXP45X Developer's Manual

Intel
18.4.3

General-Purpose Timers Operation

There are two 32-bit general-purpose timers. The general-purpose timers have six
components:
• A 32-bit down-counter
• A one_shot control bit
• A cnt_enable control bit
• A 32-bit reload value register
• A 16-bit prescale register
• A 4-bit configuration register
The purpose of the timers are to generate timed or periodic interrupts to the Intel
XScale processor.
Upon reset all the registers are initialized to zero.
The 32-bit reload value register will be packed into the same APB addressable word
with the one_shot control bit and the cnt_enable control bit. The reload value
occupying bits 31-2, one_shot in bit 1 and cnt_enable in bit 0. To achieve higher
granularity the two least significant bits are fetched from bit 0 and bit 1 in the General-
Purpose Configuration register.
For predictable operation, stop the timer before writing a new value into the reload
register.
The one_shot control bit specifies what action should be taken when the counter
reaches zero. If the one_shot control bit is set to zero, and the counter reaches zero,
the counter will load the "reload value register" and start counting down. If the
one_shot control register is set to one it will load the "reload value register" and stop
counting.
The cnt_enable control bit specifies whether the counter is enabled for counting. When
set to one the counter is enabled.
The timer simply counts down when the enable bit is set to one. The ost_tim*_int
signal is asserted when the count reaches zero and remains asserted until cleared by a
writing a 1'b1 to the appropriate bit in ost_sts register.
The General-Purpose Timers have the option of using the prescaled clock, and/or the 3/
4 scale_enable logic. The value of prescale is contained in the general-purpose prescale
registers. When and only when a prescaled clock is used, users have an option to
pause/restart the timers. This option can be controlled in the General-Purpose
Configuration registers. By writing a 1'b1 to tim0_pause_en or tim1_pause_en, the
respective counter will stop. To "wake up" the counter; refresh the prescale register for
the respective counter by re-writing the same prescale value to the associated prescale
register ost_timx_pre, and then clear the respective timx_pause_en.
Example on how to operate the General-Purpose Timer0.
1. ost_tim0_cfg <= 0x07 Configures the timer with 3/4 scale_en and the two lsb bits
in the reload value to be ones.
2. ost_tim0_pre <= 0x19 Loads the prescaler with 25, which means a divide by 26.
3. ost_tim0_rl <= 0x15 Sets the reload value to be 0x14 and the lsb enables the
counter. The reload value will now be 0x14 plus 0x03, set in step 1, a total of 0x17
(23). Since 0 is included in decrementing the real value is N+1 = 24. This setup will
now produce an interrupt interval of
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
820
® ®
IXP45X and Intel IXP46X Product Line of Network Processors—Operating System Timer
I = 3/4scale * prescale_value * reload_value
period
August 2006
Order Number: 306262-004US