General-Purpose Timer 0 Configuration Register; General-Purpose Timer 0 Prescale Register - Intel IXP45X Developer's Manual

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18.5.13

General-Purpose Timer 0 Configuration Register

Register Name:
Physical Address:
Register Description:
Access: Read/Write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits
Name
31:4
(Reserved)
3
tim0_pause_en
2
tim0_scale_en
1
tim0_bit1
0
tim0_bit0
18.5.14

General-Purpose Timer 0 Prescale Register

Register Name:
Physical Address:
Register Description:
Access: Read/Write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
(Reserved)
Register
Bits
Name
31:1
(Reserved)
6
Contains the divide factor for the timer0. The usable range is 2 -
65,535. The generated frequency equals apb_clk divided by the divide
15:0
tim0_presc
factor, which is N+1, so when tim0_presc = 0x01 it is divide by 2. The
prescaling starts when the field is written with a value other than
0x00.
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Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
Developer's Manual
828
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®
IXP45X and Intel
IXP46X Product Line of Network Processors—Operating System Timer
0xC8005030
General-Purpose Timer 0 Configuration
(Reserved)
If '0' the timer0 counter is running, when '1' the counter is stopped.
Only when the prescale/scale_en is active. This bit has no effect if the
timer is not using the prescaler/scale_en
If this field is '1', the 3/4 scale is enabled. It will make the tim0 count
with 3/4 of the frequency the timer0 is driven by. If no prescaler is
used, it will be 3/4 of the apb_clk.
This is bit 1 in a higher granularity for the reload counter for tim0.
This is bit 0 in a higher granularity for the reload counter for tim0.
0xC8005034
General-Purpose Timer 0 Prescale Register
Description
ost_tim0_cfg
Reset Hex Value:
ost_tim0_cfg
Description
ost_tim0_pre
Reset Hex Value:
ost_tim0_pre
0x00000000
8
7
6
5
4
3
2
Reset
Access
Value
28'd0
0
0
0
0
0x00000000
8
7
6
5
4
3
2
tim0_presc
Reset
Access
Value
16'h0000
16'h0000
August 2006
Order Number: 306262-004US
1
0
RO
RW
RW
RW
RW
1
0
RO
RW

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