Pci Controller Interrupt Status Register - Intel IXP45X Developer's Manual

10.5.3.9

PCI Controller Interrupt Status Register

Register Name:
Block
0xC00000
Base Address:
Indicates the PCI controller interrupt source(s).
Register Description:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits Name
31:8 reserved reserved – read as 0
PCI Doorbell interrupt. Asserted high when any one of the bits in the
7 PDB
pci_pcidoorbell register is set.
AHB Doorbell interrupt. Asserted high when any one of the bits in the
6 ADB
pci_ahbdoorbell register is set.
PCI-to-AHB DMA Complete. Asserted high when a PCI-to-AHB DMA
5 PADC
transfer is complete.
AHB-to-PCI DMA Complete. Asserted high when a AHB-to-PCI DMA
4 APDC
transfer is complete.
AHB Error indication. Set to a 1 when the AHB Master Interface receives
3 AHBE
an ERROR response.
PCI Parity Error. Set to a 1 when a parity error occurs on the PCI bus:
Parity error detected during Master Interface read transaction.
2 PPE
PCI_PERR_N asserted by an external target during a Master write
transaction. Parity error detected during a Target write transaction.
PCI Fatal Error. Set to a 1 when one of the following errors occurs on the
PCI bus:
• Master abort (target did not respond)
• Target abort
1 PFE
• TRDY timeout (external target asserts PCI_DEVSEL_N but never
• Retry timeout (external target issued more retries than specified by
PCI System Error. Set to a 1 when the PCI Controller detects that the PCI
0 PSE
PCI_SERR_N signal has been asserted.
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Develepor's Manual
564
®
Intel IXP45X and Intel
Offset Address
(Reserved)
Description
asserts PCI_TRDY_N)
the RetryTO field in the pci_rtotto register)
®
IXP46X Product Line of Network Processors—PCI Controller
pci_isr
0x20
pci_isr
0x00000000
Reset Value
Access: (See below.)
8 7 6 5 4 3 2 1
Reset PCI AHB
Value Access Access
0x0000
RO
00
0 RO
0 RO
0 RO
0 RO
0 RO RW1C
0 RO RW1C
0 RO RW1C
0 RO RW1C
August 2006
Order Number: 306262-004US
0
RO
RO
RO
RO
RO