Exponentiation Acceleration Unit - Intel IXP45X Developer's Manual

Exponentiation Acceleration Unit—Intel
Processors
25.0

Exponentiation Acceleration Unit

25.1 Overview
The Exponentiation Acceleration Unit (EAU) supports various large-number arithmetic
operations. These operations include modular exponentiation, modular reduction,
multiply, add and subtract. These operations are controlled through a set of memory
mapped registers. Parameters for and results of the operations are written in little-
endian ordering into a RAM (contained within the EAU) which the EAU state machine
accesses and also uses for temporary registers. The arithmetic operations supported by
the EAU are used by software executing in the Intel XScale
cryptographic functions such as signing and verification procedures. Since the EAU
executes only one operation at a time, the Intel XScale processor must serialize the
required operations to the EAU.
The EAU begins operating after the Intel XScale processor has moved data into the EAU
RAM and loads the EAU's command register with an appropriate command. After
executing the command, the EAU appropriately sets its status bits and waits idle until it
receives another command from the Intel XScale processor.
25.2 Feature List
• Speeds-up large number arithmetic operations
• Modular Exponentiation: Function is C=M
2,048 bits
• Modular Reduction: Function is R=A mod N where A is up to 4,096 bits and N is up
to 2,048 bits
• Large Number Multiply: Function is R=A*B where A & B are up to 2,048 bits
• Large Number Add: Function is R=A+B where A & B are up to 2,048 bits
• Large Number Subtract: Function is R=A-B where A & B are up to 2,048 bits
• Supports modulus operands of 256 / 512 / 1024 / 1536 / 2048 bits long. Support
for 256-bit operands is provided so that the Chinese Remainder Theorem (CRT)
algorithm can be used for 512-bit values.
• Modular Exponentiation time can be made independent of exponent value (Fast
Exponent configuration bit). This may help against timing attacks on the unit.
• Modular Exponentiation time can be reduced by ignoring leading zeroes (Short
Exponent configuration bit).
• Word-readable, word-writable registers
• Parameter RAM is readable and word-writable, through a internal register and state
machine.
August 2006
Order Number: 306262-004US
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IXP45X and Intel IXP46X Product Line of Network
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Intel IXP45X and Intel
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Processor to build larger
e
mod N where M, e, N are up to
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IXP46X Product Line of Network Processors
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