Initiated Pci Type-0 Configuration Read Cycle; Initiated Type-0 Read Transaction; Initiated Type-0 Write Transaction - Intel IXP45X Developer's Manual

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PCI Controller—Intel IXP45X and Intel
The details in this section are provided to understand some functional aspects of the
PCI Controller on the IXP45X/IXP46X network processors. For complete details please
refer to the PCI Local Bus Specification, Rev. 2.2.
10.2.7.1

Initiated Type-0 Read Transaction

The following transaction is a PCI Configuration Read Cycle initiated from the IXP45X/
IXP46X network processors. This diagram is to understand the inner workings of PCI
transfers and may not reflect actual operation of the PCI Controller implemented on the
IXP45X/IXP46X network processors. The Configuration transaction is initiated to the
local PCI bus segment, Device number (chosen by IDSEL), Function 0, and Base
Address Register 0.
The IDSEL signal is left up to the user to determine how to drive this signal. It may be
driven from one of the upper address signals on the PCI_AD bus. A hexadecimal value
of 0xA, written on the PCI_CBE_N bus during the PCI Bus address phase, signifies that
this is a PCI Bus Configuration Read Cycle.
Figure 80.

Initiated PCI Type-0 Configuration Read Cycle

PCI_CLK
INT_REQ_N
INT_GNT_N
PCI_FRAME_N
PCI_AD (31:0)
PCI_IDSEL
PCI_CBE_N
PCI_IRDY_N
PCI_TRDY_N
PCI_DEVSEL_N
10.2.7.2

Initiated Type-0 Write Transaction

The following transaction is a PCI Configuration Write Cycle initiated from the IXP45X/
IXP46X network processors. This diagram is to understand the inner workings of PCI
transfers and may not reflect actual operation of the PCI Controller implemented on the
IXP45X/IXP46X network processors. The transaction is initiated to the local PCI bus
segment, Device number (chosen by IDSEL), Function number 2, and Base Address
Register 0.
The IDSEL signal is left up to the user to determine how to drive this signal. It may be
driven from one of the upper address signals on the PCI_AD bus. A hexadecimal value
of 0xB written on the PCI_CBE_N bus — during the address phase — signifies that this
is a PCI Bus Configuration Write Cycle.
August 2006
Order Number: 306262-004US
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IXP46X Product Line of Network Processors
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Intel IXP45X and Intel
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IXP46X Product Line of Network Processors
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