Supported Ddri Sdram Mode Register Settings - Intel IXP45X Developer's Manual

Figure 107. Supported DDRII SDRAM Extended Mode Register Settings
The DDR SDRAM Extended
Mode Register resides in the
DDR SDRAM devices.
Note:
DDRI_BA[1:0] must be 01
A12 doesn't exist for 128 Mbit Technology
11. After waiting T
0001
The MCU supports the following DDRI SDRAM mode parameters:
a. CAS Latency (tCAS) = two or two and one-half for DDRI, or three or
four for DDRII based on the programmed setting in
"DDRI SDRAM Control Register 0
b. Burst Type = Sequential
c. Burst Length (BL) = four
Figure 108. Supported DDRI SDRAM Mode Register Settings
The DDR SDRAM mode register resides
Note:
DDRI_BA[1:0] must be 00
A12 doesn't exist for 128 Mbit Technology
12. After waiting T
SDRAM interface by setting the SDIR to 0010
13. After waiting T
cycle is accomplished by setting the SDIR to 0110
T cycles between each auto-refresh command.
rfc
14. Following the second auto-refresh cycle, software must wait T
software issues a mode-register-set command by writing to the SDIR to program the
DDRI SDRAM parameters without resetting the DLL by writing 0000
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
600
® ®
Intel IXP45X and Intel
A12
0 0
to select the Extended Mode Register.
2
cycles, software issues a mode-register-set command by writing
mrd
to the SDIR to program the DDRI SDRAM parameters and to reset the DLL.
2
A12
0
in the DDR SDRAM devices.
Operating Mode (A8:A7):
to select the Mode Register.
2
cycles, software issues a precharge-all command to the DDRI
mrd
cycles, software provides two auto-refresh cycles. An auto-refresh
rp
IXP46X Product Line of Network Processors—Memory Controller
A6
0 0
OCD is programmed
through the DDR
Calibration Unit (DCAL)
Additive Latency
SDCR0".
A6
0 0 0
00: Normal Operation
(Do not Reset DLL)
10: Normal Operation
(In DLL Reset)
Other: X
.
2
A3 A0
0 0 0
DLL Enable:
0: Enable
1: Disable
B4213-001
Section 11.6.2,
A3 A0
Burst Length:
Burst Type:
0: Sequential
CAS Latency :
010: 2 (DDR only)
011: 3 (DDR-II only)
100: 4 (DDR-II only)
110: 2.5 (DDR only)
Other: X
. Software must ensure at least
2
cycles. Then,
rfc
to the SDIR.
2
Order Number: 306262-004US
010: 4
B4214-001
August 2006