Ddri Sdram Write, 36 Bytes, Ecc Enabled, Bl=4 - Intel IXP45X Developer's Manual

Figure 115. DDRI SDRAM Write, 36 Bytes, ECC Enabled, BL=4
Command
A11, A12
BA0, BA1
Notes:
t
DI n = Data in for column n.
3 subsequent elements of data in are applied in the programmed order following DI n.
DIS AP = Disable Auto Precharge
* = Don't care if A10 is High at this point.
PRE = Precharge; ACT = Active; RA = Row Address
NOP commands are shown for ease of illustration; other valid commands may be possible at these times.
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
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Intel IXP45X and Intel
t
CK
CK
CK_N
t
IH
t
IS
CKE
t
IH
t
IS
NOP ACT
t
IH
t
IS
A0-A9,
RA
A10
RA
t
IH
t
IS
BA x
t
DQS
DQ
DM
= min
DQSS
= Don't Care
IXP46X Product Line of Network Processors—Memory Controller
t
CL
t
CH
t
RAS
NOP NOP NOP
Write
Col n
t
IH
t
IS
DIS AP
BA x
RCD t
WPRE
t
DQSS t
DSH
t
t WPST
WPRES
t
WPRE
Valid
NOP NOP PRE NOP
All Banks
One Bank
BA x
t
WR
Order Number: 306262-004US
B0407-02
August 2006