Texas Instruments OMAP5912 Reference Manual page 1470

USB Device Controller
3.26.2 USB Device Controller Hardware Reset
3.27 DMA Operation
Receive DMA Channels Overview
178 Universal Serial Bus (USB)
The OTG module allows separate control of USB device controller clocking via
OTG_SYSCON_1.DEV_IDLE_EN.
Reset of the USB device controller is provided by the ULPD module. The
PER_EN bit in the MPU reset control 2 register controls the reset to many
OMAP5912 peripherals, including the USB device controller. When held in
reset, the USB device controller does not recognize any USB activity.
When the USB device controller is in reset, its registers have no effect on USB
functionality. Software must wait until OTG_SYSCON_1.RESET_DONE is 1.
The USB device controller provides support for six DMA channels. Three
receive DMA channels are reserved to OUT transfers (ISO or non-ISO) and
three transmit DMA channels are reserved to IN transfers (ISO or non-ISO).
It is not possible to operate DMA transactions on control EP0.
The MPU must not access an endpoint used in a DMA transfer through
the EP_NUM, CTRL, and STAT_FLG registers (in DMA, this remark
applies after the MPU has set the CTRL.SET_FIFO_EN bit to enable the
RX DMA transfer). In particular, the MPU must not set the halt feature
while the endpoint is selected in the RXDMA_CFG register.
Note:
To use the DMA channels properly, you must set the DMA configuration dur-
ing the address state interrupt (DS_CHANGE).
The parameters used for DMA transactions (FIFO size, ISO endpoint,
double-buffering, and pointers) are those defined for the associated endpoint.
Receive DMA channels are programmed via the three RXDMA control
registers. Each channel is assigned to a given endpoint number by assigning
a non-zero value in RXDMA_CFG.RXDMAn_EP fields (a 0 value means the
DMA channel is deselected). Received OUT data must be read when an RX
DMA request is active, through the register DATA_DMA. The RX FIFO
accessed is that of the endpoint for which the DMA request is active (only one
RX DMA request is active at a time).
SPRU761A