Texas Instruments OMAP5912 Reference Manual page 1499

Table 64. OTG System Configuration Register 2 (OTG_SYSCON_2) (Continued)
Bit Name
10 OTG_PADEN
9 HMC_PADEN
8 UHOST_EN
† See Table 65, OTG_PADEN Source Status.
‡ See Table 66, HMC_PADEN: USB Signal Multiplexing Control Source.
SPRU761A
Description
†
OTG transceiver control and status information selector. This bit
determines how OTG_CTRL register bits ID, VBUSVLD, BSESSVLD,
BSESSEND, and ASESSEND are controlled.
When using OMAP5912 OTG controller functionality to implement an
On-The-Go dual-role device, this bit must be set to 0. In this case, those
OTG_CTRL bits are read/write bits and are controlled by system software.
When using OMAP5912 USB device controller functionality without
enabling OTG functionality, this bit must be set to 1. In this case,
OTG_CTRL register bits ID, VBUSVLD, BSESSEND, and ASESSEND are
held at 0, and OTG_CTRL bit BSESSVLD is controlled by the OMAP5912
GPIO0/USB.VBUS pin (if top-level pin multiplexing selects the USB_VBUS
mode for pin GPIO0). Software writes to those OTG_CTRL bits are ignored
when OTG_PADEN = 1.
‡
USB pin multiplexing control selector. This bit determines whether USB
signal multiplexing is controlled by registers in OTG_SYSCON_2 or by
registers in the OMAP5912 configuration register module.
0 = OTG_SYSCON_2 provides the controls.
1 = OMAP5912 configuration register module registers provide the
controls.
The host USB controller enable bit controls the clock enable and hardware
reset for the OMAP5912 USB host controller when HMC_PADEN is 0.
When HMC_PADEN is 1, writes to this bit have no effect on the clock
enable.
0: USB host controller is not clocked and is held in hardware reset.
1: USB host controller clock is not held inactive and a USB host controller
hardware reset is not forced. The USB host controller is clocked if the
ULPD 48-MHz clock output to the USB controllers is active and if the
OMAP5912 peripheral reset is inactive.
This register is cleared 1 by soft reset or hardware reset.
A read of this register gives the internal value used for UHOST_EN
regardless of the setting of HMC_PADEN.
See Section 15.1.20 USB host controller hardware reset for information on
USB host controller access restrictions relating to UHOST_EN.
USB OTG Controller
Universal Serial Bus (USB) 207