Texas Instruments OMAP5912 Reference Manual page 1510

Multimedia processor device overview and architecture
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USB OTG Controller
Table 68. OTG Interrupt Enable Register (OTG_IRQ_EN) (Continued)
Bit
Name
8
B_SRP_DONE_EN
7
B_SRP_STARTED_EN B-device SRP started interrupt enable. This bit enables interrupt
6 :1
Reserved
0
OPRT_CHG_EN
218
Universal Serial Bus (USB)
Description
B-device SRP done interrupt enable.This bit enables interrupt generation
when the OTG_IRQ_SRC:B_SRP_DONE bit is active.
0: No interrupt is generated.
1: An interrupt is generated if the OTG_IRQ_SRC:B_SRP_DONE bit is
set.
This bit is cleared 0 by soft reset or hardware reset.
generation when the OTG_IRQ_SRC:B_SRP_STARTED bit is active.
0: No interrupt is generated.
1: An interrupt is generated if the OTG_IRQ_SRC:B_SRP_STARTED bit
is set.
This bit is cleared 0 by soft reset or hardware reset.
Reserved
OTG output port status change interrupt enable: this bit enables interrupt
generation when the OTG_IRQ_SRC:OPRT_CHG bit is active.
0: No interrupt is generated.
1: An interrupt is generated if the OTG_IRQ_SRC:OPRT_CHG bit is set.
This bit is cleared 0 by soft reset or hardware reset.
This read/write register controls which OTG controller interrupts are passed
to the MPU level 2 interrupt controller IRQ_8.
SPRU761A

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