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Example 1.
Example: 100603 Bytes to Transfer via 32 Bytes IN Bulk Endpoint
Isochronous IN (USB HOST −> MPU) DMA Transactions
SPRU761A
This gives XSWL=0x3, FBT=0x47, EOTB=0x1b,
which means five passes of DMA transfer, signaled by 5 TXn_DONE
interrupts, are required:
1) EOT=0, FBT=0, loop=3
2) EOT=0, FBT=0, loop=2
3) EOT=0, FBT=0, loop=1
4) EOT=0, FBT=0x47, loop=0
5) EOT=1, FBT=0x1B, loop=0
For ISO endpoints, the transfer size counter (TXDMAn.TXn_TSC)
corresponds to the number of bytes to transmit. The programmed size must
not
exceed the programmed buffer size of the endpoint. Otherwise, the result is
unpredictable (see Figure 45).
A request to the MPU main DMA controller is generated when the endpoint
buffer is empty initially after the START bit is set, and then after each SOF
(every 1 ms). The request is removed when the number of bytes written in the
buffer matches the TXDMAn.TXn_TSC value.
During ISO transfers to a DMA operated IN endpoint, a request to the MPU
system DMA controller is generated every 1-ms frame when an isochronous
data packet is received with no error. There is no special interrupt associated
with the DMA transfer.
No interrupt is signaled to the MPU during DMA operation to ISO IN endpoints.
USB Device Controller
32768 bytes transferred (1024 x
32 bytes)
32768 bytes
32768 bytes
2272 bytes (71 x 32 bytes)
27 bytes
Universal Serial Bus (USB)
189
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