Texas Instruments OMAP5912 Reference Manual page 1515

Multimedia processor device overview and architecture

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Table 70. OTG Output pins control register (OTG_OUTCTRL) (Continued)

Table 71. OTG test register (OTG_TEST)

OTG_FSM_STATE

Table 72. OTG Vendor Code Register (OTG_ VC)

OTG Clock and Reset Requirements

USB1 Port Pull Up enabled

USB0 Port Vbus drive

USB0 Port Pull Down enabled

USB0 Port Pull Up enabled

Test mode unlock

IRQOTGON signal control

OTG FSM state

Vendor code identifier: this read-only register reflects the Texas Instruments vendor

code identifier: 0x5449 for TI in ASCII.

This register reflects the binary coded decimal equivalent of the USB vendor

code identifier assigned to Texas Instruments.

The OTG module is clocked mainly by the 48-MHz input clock from the

OMAP5912 ULPD module. The ULPD module registers control the 48 MHz.

CLOCK_CTRL_REG.USB_MCLK_EN

SOFT_REQ_REG.SOFT_USB_OTG_DPLL_REQ

SOFT_DISABLE_REQ_REG.DIS_USB_HOST_DPLL_REQ

When the OTG module receives a 48-MHz clock from the ULPD module, the

OTG controller logic can have its clocks disabled locally via the

OTG_SYSCON_1.OTG_IDLE_EN bit. The OTG module register interface is

clocked separately, so OTG module registers other than OTG_SYSCON_2

USB OTG Controller

Universal Serial Bus (USB)

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